Datasheet

RL78/L12 CHAPTER 6 TIMER ARRAY UNIT
R01UH0330EJ0200 Rev.2.00 178
Dec 13, 2013
The presence or absence of timer I/O pins in each timer array unit channel depends on the product.
Table 6-2. Timer I/O Pins Provided in Each Product
Timer array unit
channels
I/O Pins of Each Product
32-pin 44-pin 48-pin 52-pin 64-pin
Channel 0 P13/TI00,
P140/TO00
P141/TI00, P140/TO00
Channel 1 P30/TI01/TO01
Channel 2
P17/TI02/TO02
(P12)
P17/TI02/TO02
(P54)
Channel 3 − P32/TI03/TO03
Channel 4 − − P41/TI04/TO04
Channel 5 − − − P42/TI05/TO05
Channel 6 − − − P51/TI06/TO06
Channel 7 P10/TI07/TO07 P53/TI07/TO07
Remarks 1. When timer input and timer output are shared by the same pin, either only timer input or only
timer output can be used.
2. −: There is no timer I/O pin, but the channel is available. (However, the channel can only be used
as an interval timer.)
3. “(P12), (P54)” indicates an alternate port when the bit 0 of the peripheral I/O redirection register
(PIOR) is set to “1”.
Figure 6-1 shows the block diagrams of the timer array unit.