Datasheet

RL78/L12 CHAPTER 11 A/D CONVERTER
R01UH0330EJ0200 Rev.2.00 373
Dec 13, 2013
(2) If no interrupt is generated after A/D conversion ends
If the A/D conversion result value is outside the range of values specified by the A/D conversion result comparison
function (which is set up by using the ADRCK bit and ADUL/ADLL register), the A/D conversion end interrupt request
signal (INTAD) is not generated.
If the A/D conversion end interrupt request signal (INTAD) is not generated after A/D conversion ends, the clock
request signal (an internal signal) is automatically set to the low level, and supplying the high-speed on-chip oscillator
clock stops. If a hardware trigger is input later, A/D conversion work is again performed in the SNOOZE mode.
Figure 11-30. Operation Example When No Interrupt Is Generated After A/D Conversion Ends
Channel 1
No interrupt is generated
when conversion ends.
The clock request signal
remains at the low level.
Conversion standby
ADCS
Interrupt signal
(INTAD)
INTRTC
Clock request signal
(internal signal)
Conversion
status