Datasheet

RL78/L12 CHAPTER 8 12-BIT INTERVAL TIMER
R01UH0330EJ0200 Rev.2.00 314
Dec 13, 2013
8.3.1 Peripheral enable register 0 (PER0)
This register is used to enable or disable supplying the clock to the peripheral hardware. Clock supply to a hardware
macro that is not used is stopped in order to reduce the power consumption and noise.
When the 12-bit interval timer is used, be sure to set bit 7 (RTCEN) of this register to 1.
The PER0 register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 8-2. Format of Peripheral Enable Register 0 (PER0)
Address: F00F0H After reset: 00H R/W
Symbol <7> 6 <5> <4> 3 <2> 1 <0>
PER0 RTCEN 0 ADCEN IICA0EN 0 SAU0EN 0 TAU0EN
RTCEN
Control of clock supply to
real-time clock (RTC) and
12-bit interval timer
LCD driver/controller and clock output/buzzer output controller
When subsystem clock (fSUB)
is selected
When subsystem clock (fSUB)
is not selected
0
Stops input clock supply.
• SFR used by the real-time
clock (RTC) and 12-bit
interval timer cannot be
written.
• The real-time clock (RTC)
and 12-bit interval timer
are in the reset status.
Stops input clock and
subsystem clock supply.
• SFR used by the LCD
driver/controller and clock
output/buzzer output can
be read and written.
Enables input clock and
main system clock supply.
• SFR used by the LCD
driver/controller and clock
output/buzzer output can
be read and written.
1
Enables input clock supply.
• SFR used by the real-time
clock (RTC) and 12-bit
interval timer can be read
and written.
Enables input clock and
subsystem clock supply.
• SFR used by the LCD
driver/controller and clock
output/buzzer output can
be read and written.
Cautions 1. When using the 12-bit interval timer, first set the RTCEN bit to 1, while oscillation of
the input clock (f
RTC) is stable. If RTCEN = 0, writing to a control register of the real-
time clock, 12-bit interval timer, or LCD driver/controller is ignored, and, even if the
register is read, only the default value is read (except the subsystem clock supply
mode control register (OSMC)).
2. Clock supply to peripheral functions other than the real-time clock, 12-bit interval
timer, and LCD driver/controller can be stopped in STOP mode and HALT mode
when the subsystem clock is used, by setting the RTCLPC bit of the subsystem
clock supply mode control register (OSMC) to 1. In this case, set the RTCEN bit of
the PER0 register to 1 and the other bits (bits 0 to 6) to 0.
3. Be sure to clear the bits 1, 3 and 6 to 0.
<R>
<R>