Datasheet

RL78/L12
CHAPTER 31 ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105°C)
R01UH0330EJ0200 Rev.2.00 942
Dec 13, 2013
(5) Communication at different potential (1.8 V, 2.5 V, 3 V) (CSI mode) (master mode, SCKp... internal clock
output) (2/2)
(T
A = −40 to +105°C, 2.4 V ≤ EVDD = VDD ≤ 5.5 V, VSS = EVSS = 0 V)
Parameter Symbol Conditions HS (high-speed main) Mode Unit
MIN. MAX.
SIp setup time
(to SCKp↑)
Note 1
t
SIK1
4.0 V ≤ EV
DD ≤ 5.5 V, 2.7 V ≤ Vb ≤ 4.0 V,
C
b = 30 pF, Rb = 1.4 kΩ
162 ns
2.7 V ≤ EVDD < 4.0 V, 2.3 V ≤ Vb ≤ 2.7 V,
C
b = 30 pF, Rb = 2.7 kΩ
354 ns
2.4 V ≤ EVDD < 3.3 V, 1.6 V ≤ Vb ≤ 2.0 V,
C
b = 30 pF, Rb = 5.5 kΩ
958 ns
SIp hold time
(from SCKp↑)
Note 1
t
KSI1
4.0 V ≤ EV
DD ≤ 5.5 V, 2.7 V ≤ Vb ≤ 4.0 V,
C
b = 30 pF, Rb = 1.4 kΩ
38 ns
2.7 V ≤ EVDD < 4.0 V, 2.3 V ≤ Vb ≤ 2.7 V,
C
b = 30 pF, Rb = 2.7 kΩ
38 ns
2.4 V ≤ EVDD < 3.3 V, 1.6 V ≤ Vb ≤ 2.0 V,
C
b = 30 pF, Rb = 5.5 kΩ
38 ns
Delay time from SCKp↓ to
SOp output
Note 1
t
KSO1
4.0 V ≤ EV
DD ≤ 5.5 V, 2.7 V ≤ Vb ≤ 4.0 V,
C
b = 30 pF, Rb = 1.4 kΩ
200 ns
2.7 V ≤ EVDD < 4.0 V, 2.3 V ≤ Vb ≤ 2.7 V,
C
b = 30 pF, Rb = 2.7 kΩ
390 ns
2.4 V ≤ EVDD < 3.3 V, 1.6 V ≤ Vb ≤ 2.0 V,
C
b = 30 pF, Rb = 2.7 kΩ
966 ns
SIp setup time
(to SCKp↓)
Note
t
SIK1
4.0 V ≤ EV
DD ≤ 5.5 V, 2.7 V ≤ Vb ≤ 4.0 V,
C
b = 30 pF, Rb = 1.4 kΩ
88 ns
2.7 V ≤ EVDD < 4.0 V, 2.3 V ≤ Vb ≤ 2.7 V,
C
b = 30 pF, Rb = 2.7 kΩ
88 ns
2.4 V ≤ EVDD < 3.3 V, 1.6 V ≤ Vb ≤ 2.0 V,
C
b = 30 pF, Rb = 5.5 kΩ
220 ns
SIp hold time
(from SCKp↓)
Note 2
t
KSI1
4.0 V ≤ EV
DD ≤ 5.5 V, 2.7 V ≤ Vb ≤ 4.0 V,
C
b = 30 pF, Rb = 1.4 kΩ
38 ns
2.7 V ≤ EVDD < 4.0 V, 2.3 V ≤ Vb ≤ 2.7 V,
C
b = 30 pF, Rb = 2.7 kΩ
38 ns
2.4 V ≤ EVDD < 3.3 V, 1.6 V ≤ Vb ≤ 2.0 V,
C
b = 30 pF, Rb = 5.5 kΩ
38 ns
Delay time from SCKp↑ to
SOp output
Note 2
t
KSO1
4.0 V ≤ EV
DD ≤ 5.5 V, 2.7 V ≤ Vb ≤ 4.0 V,
C
b = 30 pF, Rb = 1.4 kΩ
50 ns
2.7 V ≤ EVDD < 4.0 V, 2.3 V ≤ Vb ≤ 2.7 V,
C
b = 30 pF, Rb = 2.7 kΩ
50 ns
2.4 V ≤ EVDD < 3.3 V, 1.6 V ≤ Vb ≤ 2.0 V,
C
b = 30 pF, Rb = 5.5 kΩ
50 ns
(Notes, Caution and Remarks are listed on the page after the next page.)