Datasheet

RL78/L12 CHAPTER 30 ELECTRICAL SPECIFICATIONS (A, G: T
A = -40 to +85°C)
R01UH0330EJ0200 Rev.2.00 897
Dec 13, 2013
(3) I
2
C fast mode plus
(T
A = 40 to +85°C, 1.6 V EVDD = VDD 5.5 V, VSS = EVSS = 0 V)
Parameter Symbol Conditions
HS (high-speed
main) Mode
LS (low-speed
main) Mode
LV (low-voltage
main) Mode
Unit
MIN. MAX. MIN. MAX. MIN. MAX.
SCLA0 clock frequency fSCL
Fast mode plus:
f
CLK 10 MHz
2.7 V EV
DD 5.5 V 0 1000
kHz
Setup time of restart
condition
t
SU:STA 2.7 V EVDD 5.5 V 0.26
μ
s
Hold time
Note 1
tHD:STA 2.7 V EVDD 5.5 V 0.26
μ
s
Hold time when SCLA0 =
“L”
t
LOW 2.7 V EVDD 5.5 V 0.5
μ
s
Hold time when SCLA0 =
“H”
t
HIGH 2.7 V EVDD 5.5 V 0.26
μ
s
Data setup time
(reception)
t
SU:DAT 2.7 V EVDD 5.5 V 50
μ
s
Data hold time
(transmission)
Note 2
t
HD:DAT 2.7 V EVDD 5.5 V 0 0.45
μ
s
Setup time of stop
condition
t
SU:STO 2.7 V EVDD 5.5 V 0.26
μ
s
Bus-free time tBUF 2.7 V EVDD 5.5 V 0.5
μ
s
Notes 1. The first clock pulse is generated after this period when the start/restart condition is detected.
2. The maximum value (MAX.) of t
HD:DAT is during normal transfer and a wait state is inserted in the ACK
(acknowledge) timing.
Caution The values in the above table are applied even when bit 2 (PIOR2) in the peripheral I/O redirection
register (PIOR) is 1. At this time, the pin characteristics (I
OH1, IOL1, VOH1, VOL1) must satisfy the values in
the redirect destination.
Remark The maximum value of Cb (communication line capacitance) and the value of Rb (communication line pull-up
resistor) at that time in each mode are as follows.
Fast mode plus: C
b = 120 pF, Rb = 1.1 kΩ
IICA serial transfer timing
t
LOW
t
LOW
t
HIGH
t
HD:STA
Stop
condition
Start
condition
Restart
condition
Stop
condition
t
SU:DAT
t
SU:STA
t
SU:STO
t
HD:STA
t
HD:DAT
SCLA0
SDAA0
<R>