Datasheet

RL78/L12 CHAPTER 3 CPU ARCHITECTURE
R01UH0330EJ0200 Rev.2.00 62
Dec 13, 2013
3.1.3 Internal data memory space
The RL78/L12 products incorporate the following RAMs.
Table 3-4. Internal RAM Capacity
Part Number Internal RAM
R5F10Rx8 (x = B, F, G, J)
1024 × 8 bits (FFB00H to FFEFFH)
R5F10RxA (x = B, F, G, J, L)
R5F10RxC (x = B, F, G, J, L)
1536 × 8 bits (FF900H to FFEFFH)
The internal RAM can be used as a data area and a program area where instructions are fetched (it is prohibited to use
the general-purpose register area for fetching instructions). Four general-purpose register banks consisting of eight 8-bit
registers per bank are assigned to the 32-byte area of FFEE0H to FFEFFH of the internal RAM area.
The internal RAM is used as stack memory.
Cautions 1. It is prohibited to use the general-purpose register (FFEE0H to FFEFFH) space for fetching
instructions or as a stack area.
2. Do not allocate RAM addresses which are used as a stack area, a data buffer, a branch
destination of vector interrupt processing, and a DMA transfer destination/transfer source to the
area FFE20H to FFEDFH when performing self-programming and rewriting the data flash memory.
3. Use of the RAM areas of the following products is prohibited when performing self-programming
and rewriting the data flash memory, because these areas are used for each library.
R5F10Rx8 (x = B, F, G, J) : FFB00H to FFC89H
R5F10RxA (x = B, F, G, J, L) : FFB00H to FFC89H
R5F10RxC (x = B, F, G, J, L) : FF900H to FFC89H
3.1.4 Special function register (SFR) area
On-chip peripheral hardware special function registers (SFRs) are allocated in the area FFF00H to FFFFFH (see Table
3-5 in 3.2.4 Special function registers (SFRs)).
Caution Do not access addresses to which SFRs are not assigned.
3.1.5 Extended special function register (2nd SFR: 2nd Special Function Register) area
On-chip peripheral hardware special function registers (2nd SFRs) are allocated in the area F0000H to F07FFH (see
Table 3-6 in 3.2.5 Extended special function registers (2nd SFRs: 2nd Special Function Registers)).
SFRs other than those in the SFR area (FFF00H to FFFFFH) are allocated to this area. An instruction that accesses
the extended SFR area, however, is 1 byte longer than an instruction that accesses the SFR area.
Caution Do not access addresses to which extended SFRs are not assigned.
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