Datasheet

RL78/L12 CHAPTER 23 SAFETY FUNCTIONS
R01UH0330EJ0200 Rev.2.00 787
Dec 13, 2013
23.3.6 Invalid memory access detection function
The IEC60730 standard mandates checking that the CPU and interrupts are operating correctly.
The illegal memory access detection function triggers a reset if a memory space specified as access-prohibited is
accessed.
The illegal memory access detection function applies to the areas indicated by NG in Figure 23-11.
Figure 23-11. Invalid access detection area
Special function register (SFR)
256 byte
RAM
Note
General-purpose register
32 byte
Code flash memory
Note
Special function register (2nd SFR)
2 Kbyte
Reserved
Reserved
Mirror
Data flash memory
Read
Write
Fetching
instructions
(execute)
Possibility access
OK
OK
OK
OK
OK
OK
OKOK
NG
NG
NG
NG
NG
NG
NG
00000H
yyyyyH
zzzzzH
xxxxxH
FFFFFH
FFEFFH
FFF00H
FFEDFH
FFEE0H
F1000H
F0FFFH
F0800H
F07FFH
F0000H
EFFFFH
EF000H
EEFFFH
Note The following table lists the code flash memory, RAM, and lowest detection address for each product:
Products Code flash memory
(00000H to xxxxxH)
RAM
(zzzzzH to FFEFFH)
Detected lowest address
for read/instruction fetch
(execution) (yyyyyH)
R5F10Rx8 (x = B, F, G, J) 8192 × 8 bit
(00000H to 01FFFH)
1024 × 8 bit
(FFB00H to FFEFFH)
10000H
R5F10RxA (x = B, F, G, J, L) 16384 × 8 bit
(00000H to 03FFFH)
1024 × 8 bit
(FFB00H to FFEFFH)
10000H
R5F10RxC (x = B, F, G, J, L) 32768 × 8 bit
(00000H to 07FFFH)
1536 × 8 bit
(FF900H to FFEFFH)
10000H
<R>
<R>