Datasheet

RL78/L12 CHAPTER 14 LCD CONTROLLER/DRIVER
R01UH0330EJ0200 Rev.2.00 629
Dec 13, 2013
14.6 Setting the LCD Controller/Driver
Set the LCD controller/driver using the following procedure.
Caution To operate the LCD controller/driver, be sure to follow procedures (1) to (4). Unless these
procedures are observed, the operation will not be guaranteed.
(1) External resistance division method during normal liquid crystal waveform display
Figure 14-18. External Resistance Division Method Setting Procedure
During Normal Liquid Crystal Waveform Display
MDSET1 and MDSET0 bits of LCDM0 register = 00B
(Specify the external resistance division method.)
Specify the segment output pins by using the PFSEGx register.
Store display data in RAM for LCD display.
No. of time slices 4 or lower ?
Yes
No
Set a display data area (A-pattern or B-pattern area, or blinking display)
by using the BLON and LCDSEL bits of the LCDM1 register.
Specify the LCD clock by using the LCDC0 and MCDC registers.
SCOC bit of LCDM1 register = 1
(Common pin outputs select signal and segment pin outputs deselect signal.)
LCDON bit of LCDM1 register = 1
(Common and segment pins output select and deselect signals
in accordance with display data.)
START
Select the display waveform (select waveform A or B), number of time slices,
and bias method by using the LWAVE, LDTY2 to LDTY0, LBAS1,
and LBAS0 bits of the LCDM0 register.
Store display data in RAM for LCD display.
[To change BLON and LCDSEL bit settings during operation]
Set a display data area (A-pattern or B-pattern area, or blinking display) by
using the BLON and LCDSEL bits of the LCDM1 register.
The SCOC and
LCDON bits can be set
together.