Datasheet

RL78/L12 CHAPTER 13 SERIAL INTERFACE IICA

R01UH0330EJ0200 Rev.2.00 522

Dec 13, 2013

13.3 Registers Controlling Serial Interface IICA

Serial interface IICA is controlled by the following eight registers.

• Peripheral enable register 0 (PER0)

• IICA control register 00 (IICCTL00)

• IICA flag register 0 (IICF0)

• IICA status register 0 (IICS0)

• IICA control register 01 (IICCTL01)

• IICA low-level width setting register 0 (IICWL0)

• IICA high-level width setting register 0 (IICWH0)

• Port mode register 6 (PM6)

• Port register 6 (P6)

13.3.1 Peripheral enable register 0 (PER0)

This register is used to enable or disable supplying the clock to the peripheral hardware. Clock supply to a hardware

macro that is not used is stopped in order to reduce the power consumption and noise.

When serial interface IICA0 is used, be sure to set bit 4 (IICA0EN) of this register to 1.

The PER0 register can be set by a 1-bit or 8-bit memory manipulation instruction.

Reset signal generation clears this register to 00H.

Figure 13-5. Format of Peripheral Enable Register 0 (PER0)

Address: F00F0H (PER0) After reset: 00H R/W

Symbol <7> 6 <5> <4> 3 <2> 1 <0>

PER0 RTCEN 0 ADCEN IICA0EN 0 SAU0EN 0 TAU0EN

IICA0EN Control of serial interface IICA0 input clock supply

Stops input clock supply.

• SFR used by serial interface IICA0 cannot be written.

• Serial interface IICA0 is in the reset status.

Enables input clock supply.

• SFR used by serial interface IICA0 can be read/written.

Cautions 1. When setting serial interface IICA0, be sure to set the following registers first while the

IICAnEN bit is set to 1. If IICAnEN = 0, the control registers of serial interface IICA are set

to their initial values, and writing to them is ignored (except for port mode register 6