Datasheet

RL78/L12 CHAPTER 8 12-BIT INTERVAL TIMER
R01UH0330EJ0200 Rev.2.00 313
Dec 13, 2013
CHAPTER 8 12-BIT INTERVAL TIMER
8.1 Functions of 12-bit Interval Timer
An interrupt (INTIT) is generated at any previously specified time interval. It can be utilized for wakeup from STOP
mode and triggering an A/D converter’s SNOOZE mode.
8.2 Configuration of 12-bit Interval Timer
The 12-bit interval timer includes the following hardware.
Table 8-1. Configuration of 12-bit Interval Timer
Item Configuration
Counter 12-bit counter
Control registers Peripheral enable register 0 (PER0)
Subsystem clock supply mode control register (OSMC)
Interval timer control register (ITMC)
Figure 8-1. Block Diagram of 12-bit Interval Timer
WUTMM
CK0
fSUB
fIL
RINTE ITMCMP11-ITMCMP0
Subsystem clock supply
mode control register
(OSMC)
Interval timer control
register (ITMC)
Interrupt request
signal (INTIT)
Count clock
12-bit counter
Clear
Match signal
Selector
Internal bus
8.3 Registers Controlling 12-bit Interval Timer
The 12-bit interval timer is controlled by the following registers.
• Peripheral enable register 0 (PER0)
• Subsystem clock supply mode control register (OSMC)
• Interval timer control register (ITMC)
<R>
<R>
<R>