Datasheet

RL78/L12 CHAPTER 4 PORT FUNCTIONS
R01UH0330EJ0200 Rev.2.00 115
Dec 13, 2013
4.3.10 LCD input switch control register (ISCLCD)
The CAPL/P126, CAPH/P127, and VL3/P125 pins are internally connected with a Schmitt trigger buffer. To use these
pins as LCD function, input to the Schmitt trigger buffer must be disabled, in order to prevent through-currents from
entering.
The ISCLCD register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets these registers to 00H.
Figure 4-10. Format of LCD input switch control register (ISCLCD)
Address: F0308H After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
ISCLCD 0 0 0 0 0 0 ISCVL3 ISCCAP
ISCVL3 Control of schmitt trigger buffer of VL3/P125 pin
0 Makes digital input ineffective
1 Makes digital input effective
ISCCAP Control of schmitt trigger buffer of CAPL/ P126 and CAPH/P127 pins
0 Makes digital input ineffective
1 Makes digital input effective
Cautions 1. If ISCVL3 bit = 0, set the corresponding port control registers as follows:
PU125 bit of PU12 register = 0, P125 bit of P12 register = 0
2. If ISCCAP bit = 0, set the corresponding port control registers as follows:
PU127 bit of PU12 register = 0, P127 bit of P12 register = 0
PU126 bit of PU12 register = 0, P126 bit of P12 register = 0