Datasheet
RL78/L12 APPENDIX A REVISION HISTORY
R01UH0330EJ0200 Rev.2.00 979
Dec 13, 2013
A.2 Revision History of Preceding Editions
Here is the revision history of the preceding editions. Chapter indicates the chapter of each edition.
(1/10)
Edition
Description Chapter
Rev.1.00
Renamed interval timer (unit) to 12-bit interval timer
Though out
Addition of pin name of the peripheral I/O redirection function
Renamed VLVI, VLVIH, VLVIL to VLVD, VLVDH, VLVDL (LVD detection voltage)
Renamed interrupt source of RAM parity error (RAMTOP) to RPE
Modification from 1.2 Ordering Information to 1.2 List of Part Numbers
CHAPTER 1
OUTLINE
Addition of Figure 1-1. Part Number, Memory Size, and Package of RL78/L12
Modification of description of INTP0 to INTP7 in 1.4 Pin Identification
Modification of 1.5 Block Diagram
Addition and Modification of description in 1.6 Outline of Functions
Modification of 2.1 Port Function
CHAPTER 2
PIN FUNCTIONS
Addition of remark to 2.3 Pin I/O Circuits and Recommended Connection of Unused Pins
Change of Figure 2-1. Pin I/O Circuit List
Modification of description in 3.1 Memory Space
CHAPTER 3
CPU ARCHITECTURE
Modification of Figures 3-1 to 3-3
Addition of remark to Table 3-1. Correspondence Between Address Values and Block
Numbers in Flash Memory
Modification of description in 3.1.1 (4) On-chip debug security ID setting area
Modification of description in 3.1.2 Mirror area
Deletion of caution 2 in Figure 3-4. Format of Processor Mode Control Register (PMC)
Modification of description and cautions 1, 2 in 3.1.3 Internal data memory space
Modification of description in 3.1.6 Data memory addressing
Addition of Figures 3-5 to 3-7
Modification of 3.2.1 Control registers, 3.2.2 General-purpose registers, and 3.2.3 ES and
CS registers
Modification of description in 3.2.4 Special function registers (SFRs)
Addition of note 5 to Table 3-5. SFR List (3/4)
Modification of description in 3.2.5 Extended special function registers (2nd SFRs: 2nd
Special Function Registers)
Modification of After Reset of HIOTRM register and notes 1, 2 in Table 3-6. Extended SFR
(2nd SFR) List (1/6)
Modification of Figures 3-14 to 3-16, 3-18 to 3-41
Modification of [Operand format] in 3.4.1 Implied addressing
Modification of [Operand format] in 3.4.3 Direct addressing
Modification of [Function] in 3.4.7 Based addressing
Modification from [Operand format] to [Description format], modification of [Function] and
[Description format], and addition of description in 3.4.9 Stack addressing