Datasheet

RL78/L12 CHAPTER 23 SAFETY FUNCTIONS
R01UH0330EJ0200 Rev.2.00 789
Dec 13, 2013
23.3.7 Frequency detection function
The IEC60730 standard mandates checking that the oscillation frequency is correct.
By using the CPU/peripheral hardware clock frequency (f
CLK) and measuring the pulse width of the input signal to
channel 5 of the timer array unit 0 (TAU0), whether the proportional relationship between the two clock frequencies is
correct can be determined. Note that, however, if one or both clock operations are completely stopped, the proportional
relationship between the clocks cannot be determined.
<Clocks to be compared>
<1> CPU/peripheral hardware clock frequency (f
CLK):
• High-speed on-chip oscillator clock (f
IH)
• High-speed system clock (fMX)
<2> Input to channel 1 of the timer array unit
• Timer input to channel 1 (TI01)
• Low-speed on-chip oscillator clock (f
IL: 15 kHz (typ.))
• Subsystem clock (f
SUB)
Note
Figure 23-13. Configuration of Frequency Detection Function
TI01
f CLK
High-speed on-chip
oscillator clock (f
IH )
High-speed system
clock (f
MX )
Subsystem clock
(f
SUB )
Note
Low-speed on-chip
oscillator clock
(15 kHz (typ.))
Watchdog timer
(WDT)
<1>
<2>
f
IL
Channel 1 of timer
array unit 0
(TAU0)
SelectorSelector
<Operational overview>
Whether the clock frequency is correct or not can be judged by measuring the pulse interval under the following
conditions:
• The high-speed on-chip oscillator clock (f
IH) or the external X1 oscillation clock (fMX) is selected as the
CPU/peripheral hardware clock (f
CLK).
• The low-speed on-chip oscillator clock (f
IL: 15 kHz) is selected as the timer input for channel 1 of timer array unit 0
(TAU0).
If input pulse interval measurement results in an abnormal value, it can be concluded that the clock frequency is
abnormal.
For how to execute input pulse interval measurement, see 6.8.4 Operation as input pulse interval measurement.
Note Can only be selected in the products incorporating the subsystem clock.
<R>