Datasheet

RL78/L12 CHAPTER 19 STANDBY FUNCTION
R01UH0330EJ0200 Rev.2.00 744
Dec 13, 2013
Table 19-3. Operating Statuses in SNOOZE Mode
STOP Mode Setting
Item
When Inputting CSI00/UART0 Data Reception Signal or A/D Converter Timer Trigger Signal
While in STOP Mode
When CPU Is Operating on High-Speed On-Chip Oscillator Clock (fIH)
System clock Clock supply to the CPU is stopped
Main system clock fIH Operation started
fX Stopped
fEX
Subsystem clock fXT Use of the status while in the STOP mode continues
fEXS
fIL Set by bits 0 (WDSTBYON) and 4 (WDTON) of option byte (000C0H), and WUTMMCK0 bit of
subsystem clock supply mode control register (OSMC)
• WUTMMCK0 = 1: Oscillates
• WUTMMCK0 = 0 and WDTON = 0: Stops
• WUTMMCK0 = 0, WDTON = 1, and WDSTBYON = 1: Oscillates
• WUTMMCK0 = 0, WDTON = 1, and WDSTBYON = 0: Stops
CPU Operation stopped
Code flash memory
Data flash memory
RAM
Port (latch) Use of the status while in the STOP mode continues
Timer array unit Operation disabled
Real-time clock (RTC) Operable
12-bit interval timer
Watchdog timer See CHAPTER 10 WATCHDOG TIMER
Clock output/buzzer output Operates when the subsystem clock is selected as the clock source for counting and the
RTCLPC bit is 0 (operation is disabled when a clock other than the subsystem clock is selected
and the RTCLPC bit is not 0).
A/D converter Operable
Serial array unit (SAU)
Operable only CSI00 and UART0 only. Operation disabled other than CSI00 and UART0.
Serial interface (IICA)
Operation disabled
LCD driver/controller Operable (However, this depends on the status of the clock selected as the LCD source clock:
operation is possible if the selected clock is operating, but operation will stop if the selected
clock is stopped.)
Multiplier and divider/multiply-
accumulator
Operation disabled
DMA controller
Power-on-reset function Operable
Voltage detection function
External interrupt
Key interrupt function
CRC
operation
function
High-speed CRC
Operation stopped
General-purpose
CRC
RAM parity error detection
function
RAM guard function
SFR guard function
Illegal-memory access
detection function
Remark Operation stopped: Operation is automatically stopped before switching to the SNOOZE mode.
Operation disabled: Operation is stopped before switching to the SNOOZE mode.
f
IH: High-speed on-chip oscillator clock fIL: Low-speed on-chip oscillator clock
f
X: X1 clock fEX: External main system clock
fXT: XT1 clock fEXS: External subsystem clock