Datasheet

RL78/L12 CHAPTER 19 STANDBY FUNCTION
R01UH0330EJ0200 Rev.2.00 740
Dec 13, 2013
Cautions 1. To stop the low-speed on-chip oscillator clock in the STOP mode, must previously be set an option
byte to stop the watchdog timer operation in the HALT/STOP mode (bit 0 (WDSTBYON) of 000C0H =
0).
2. To shorten oscillation stabilization time after the STOP mode is released when the CPU operates
with the high-speed system clock (X1 oscillation), temporarily switch the CPU clock to the high-
speed on-chip oscillator clock before the execution of the STOP instruction. Before changing the
CPU clock from the high-speed on-chip oscillator clock to the high-speed system clock (X1
oscillation) after the STOP mode is released, check the oscillation stabilization time with the
oscillation stabilization time counter status register (OSTC).
(2) STOP mode release
The STOP mode can be released by the following two sources.
(a) Release by unmasked interrupt request
When an unmasked interrupt request is generated, the STOP mode is released. After the oscillation stabilization
time has elapsed, if interrupt acknowledgment is enabled, vectored interrupt servicing is carried out. If interrupt
acknowledgment is disabled, the next address instruction is executed.
Figure 19-3. STOP Mode Release by Interrupt Request Generation (1/2)
(1) When high-speed on-chip oscillator clock is used as CPU clock
Standby release signal
Note 1
Status of CPU
High-speed on-chip
oscillator clock
Normal operation
(high-speed on-chip
oscillator clock)
Oscillates
STOP mode
Oscillation stopped
Wait for oscillation
accuracy stabilization
Interrupt
request
STOP
instruction
Normal operation
(high-speed on-chip
oscillator clock)
Oscillates
Wait
Supply of the
clock is stopped
STOP mode release time
Note 2
Notes 1. For details of the standby release signal, see Figure 17-1.
2. STOP mode release time
Supply of the clock is stopped: 18 μs to 65 μs
Wait
When vectored interrupt servicing is carried out: 7 clocks
When vectored interrupt servicing is not carried out: 1 clock
Remarks 1. The clock supply stop time varies depending on the temperature conditions and STOP mode
period.
2. The broken lines indicate the case when the interrupt request that has released the standby mode
is acknowledged.
<R>
<R>
<R>