Datasheet

RL78/L12 CHAPTER 19 STANDBY FUNCTION
R01UH0330EJ0200 Rev.2.00 734
Dec 13, 2013
Table 19-1. Operating Statuses in HALT Mode (1/2)
HALT Mode Setting
Item
When HALT Instruction Is Executed While CPU Is Operating on Main System Clock
When CPU Is Operating on
High-Speed On-Chip Oscillator
Clock (f
IH)
When CPU Is Operating on
X1 Clock (f
X)
When CPU Is Operating on
External Main System Clock
(f
EX)
System clock Clock supply to the CPU is stopped
Main system clock fIH Operation continues (cannot
be stopped)
Operation disabled
fX Operation disabled Operation continues (cannot
be stopped)
Cannot operate
fEX Cannot operate Operation continues (cannot
be stopped)
Subsystem clock fXT Status before HALT mode was set is retained
fEXS
fIL Set by bits 0 (WDSTBYON) and 4 (WDTON) of option byte (000C0H), and WUTMMCK0 bit of
subsystem clock supply mode control register (OSMC)
• WUTMMCK0 = 1: Oscillates
• WUTMMCK0 = 0 and WDTON = 0: Stops
• WUTMMCK0 = 0, WDTON = 1, and WDSTBYON = 1: Oscillates
• WUTMMCK0 = 0, WDTON = 1, and WDSTBYON = 0: Stops
CPU Operation stopped
Code flash memory
Data flash memory
RAM
Port (latch) Status before HALT mode was set is retained
Timer array unit Operable
Real-time clock (RTC)
12-bit interval timer
Watchdog timer See CHAPTER 10 WATCHDOG TIMER
Clock output/buzzer output Operable
A/D converter
Serial array unit (SAU)
Serial interface (IICA)
LCD driver/controller Operable (However, this depends on the status of the clock selected as the LCD source clock:
operation is possible if the selected clock is operating, but operation will stop if the selected
clock is stopped.)
Multiplier and divider/multiply-
accumulator
Operable
DMA controller
Power-on-reset function
Voltage detection function
External interrupt
Key interrupt function
CRC
operation
function
High-speed CRC
General-purpose
CRC
In the calculation of the RAM area, operable when DMA is executed only
RAM parity error detection
function
Operable when DMA is executed only
RAM guard function
SFR guard function
Illegal-memory access
detection function
Remark Operation stopped: Operation is automatically stopped before switching to the HALT mode.
Operation disabled: Operation is stopped before switching to the HALT mode.
f
IH: High-speed on-chip oscillator clock fIL: Low-speed on-chip oscillator clock
f
X: X1 clock fEX: External main system clock
fXT: XT1 clock fEXS: External subsystem clock