Datasheet

RL78/L12 CHAPTER 17 INTERRUPT FUNCTIONS
R01UH0330EJ0200 Rev.2.00 710
Dec 13, 2013
17.3.2 Interrupt mask flag registers (MK0L, MK0H, MK1L, MK1H, MK2L)
The interrupt mask flags are used to enable/disable the corresponding maskable interrupt servicing.
The MK0L, MK0H, MK1L, MK1H, and MK2L registers can be set by a 1-bit or 8-bit memory manipulation instruction.
When the MK0L and MK0H registers, and the MK1L and MK1H registers are combined to form 16-bit registers MK0 and
MK1, they can be set by a 16-bit memory manipulation instruction.
Reset signal generation sets these registers to FFH.
Remark If an instruction that writes data to this register is executed, the number of instruction execution clocks
increases by 2 clocks.
Figure 17-3. Format of Interrupt Mask Flag Registers (MK0L, MK0H, MK1L, MK1H, MK2L)(64-pin products)
Address: FFFE4H After reset: FFH R/W
Symbol <7> <6> <5> <4> <3> <2> <1> <0>
MK0L PMK5 PMK4 PMK3 PMK2 PMK1 PMK0 LVIMK WDTIMK
Address: FFFE5H After reset: FFH R/W
Symbol 7 <6> <5> <4> <3> <2> <1> <0>
MK0H 1 TMMK00 1
SREMK0
TMMK01H
SRMK0
CSIMK01
STMK0
CSIMK00
DMAMK1 DMAMK0
Address: FFFE6H After reset: FFH R/W
Symbol <7> <6> <5> <4> <3> <2> <1> <0>
MK1L ITMK RTCMK ADMK TMMK03 TMMK02 TMMK01 IICAMK0 TMMK03H
Address: FFFE7H After reset: FFH R/W
Symbol <7> <6> <5< <4> 3 2 1 <0>
MK1H TMMK07 TMMK06 TMMK05 TMMK04 1 1 1 KRMK
Address: FFFD4H After reset: FFH R/W
Symbol 7 6 5 <4> <3> <2> <1> <0>
MK2L 1 1 1 FLMK MDMK PMK7 PMK6 0
XXMKX Interrupt servicing control
0 Interrupt servicing enabled
1 Interrupt servicing disabled
Caution The above is the bit layout for the 64-pin products. The available bits differ depending
on the product. For details about the bits available for each product, see Table 17-2.
Be sure to set bits that are not available to the initial value.