Datasheet

RL78/L12 CHAPTER 14 LCD CONTROLLER/DRIVER
R01UH0330EJ0200 Rev.2.00 614
Dec 13, 2013
14.3.4 Subsystem clock supply mode control register (OSMC)
OSMC is used to reduce power consumption by stopping as many unnecessary clock functions as possible.
If the RTCLPC bit is set to 1, power consumption can be reduced, because clock supply to the peripheral functions,
except the real-time clock, 12-bit interval timer, clock output/buzzer output, and LCD controller/driver, is stopped in HALT
mode while the subsystem clock is selected as the CPU clock. Set bit 7 (RTCEN) of peripheral enable register 0 (PER0)
to 1 before specifying this setting.
In addition, the OSMC register can be used to select the operation clock of the real-time clock, 12-bit interval timer, and
LCD controller/driver.
This register is set by using an 8-bit memory manipulation instruction.
Reset signal generation sets this register to 00H.
Figure 14-5. Format of Subsystem Clock Supply Mode Control Register (OSMC)
Address: F00F3H After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
OSMC RTCLPC 0 0
WUTMMCK0 0 0 0 0
RTCLPC Setting in HALT mode while subsystem clock is selected as CPU clock
0 Enables subsystem clock supply to peripheral functions.
(See Table 19-1 for the peripheral functions whose operations are enabled.)
1 Stops subsystem clock supply to peripheral functions except real-time clock, 12-bit interval timer,
and LCD controller/driver.
WUTMMCK0
Note
Selection of operation clock for real-time clock,
12-bit interval timer, and LCD driver/controller
Selection of clock output from PCLBUZn pin of
clock output/buzzer output
0
Subsystem clock (fSUB)
Selecting the subsystem clock (fSUB) is enabled.
1
Low-speed on-chip oscillator clock (fIL)
Selecting the subsystem clock (fSUB) is disabled.
Note Be sure to select the subsystem clock (WUTMMCK0 bit = 0) if the subsystem clock is oscillating.
Cautions 1. The subsystem clock and low-speed on-chip oscillator clock can only be switched
by using the WUTMMCK0 bit if the real-time clock, 12-bit interval timer, and LCD
driver/controller are all stopped. The setting must not be changed after the
operation starts.
These are stopped as follows:
Real-time clock: Set the RTCE bit to 0.
12-bit interval timer: Set the RINTE bit to 0.
LCD driver/controller: Set the SCOC and VLCON bits to 0.
2. The 32-pin product does not have a subsystem clock. Therefore, be sure to select
the low-speed on-chip oscillator clock (WUTMMCK0 = 1) when selecting a low-
speed clock as the LCD source clock (f
LCD).
Remark RTCE: Bit 7 of real-time clock control register 0 (RTCC0)
RINTE: Bit 15 of interval timer control register (ITMC)
SCOC: Bit 6 of LCD mode register 1 (LCDM1)
VLCON: Bit 5 of LCD mode register 1 (LCDM1)
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