Datasheet

RL78/L12 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0330EJ0200 Rev.2.00 392
Dec 13, 2013
Figure 12-6. Format of Serial Communication Operation Setting Register mn (SCRmn) (1/2)
Address: F0118H, F0119H (SCR00), F011AH, F011BH (SCR01) After reset: 0087H R/W
Symbol 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SCRmn
TXE
mn
RXE
mn
DAP
mn
CKP
mn
0
EOC
mn
PTC
mn1
PTC
mn0
DIR
mn
0
SLC
mn1
Note 1
SLC
mn0
0 1
DLS
mn1
DLS
mn0
TXE
mn
RXE
mn
Setting of operation mode of channel n
0 0 Disable communication.
0 1 Reception only
1 0 Transmission only
1 1 Transmission/reception
DAP
mn
CKP
mn
Selection of data and clock phase in CSI mode Type
0 0
D7 D6 D5 D4 D3 D2 D1 D0
SCKp
SOp
SI p input timing
1
0 1
D7 D6 D5 D4 D3 D2 D1 D0
SCKp
SOp
SI p input timing
2
1 0
D7 D6 D5 D4 D3 D2 D1 D0
SCKp
SOp
SI p input timing
3
1 1
D7 D6 D5 D4 D3 D2 D1 D0
SCKp
SOp
SI p input timing
4
Be sure to set DAPmn, CKPmn = 0, 0 in the UART mode.
EOC
mn
Selection of masking of error interrupt signal (INTSREx (x = 0 to 3))
0 Masks error interrupt INTSREx (INTSRx is not masked).
1 Enables generation of error interrupt INTSREx (INTSRx is masked if an error occurs).
Set EOCmn = 0 in the CSI mode, and during UART transmission
Note 2
.
Notes 1. The SCR00 register only.
2. When using CSIp not with EOCmn = 0, error interrupt INTSREn may be generated.
Caution Be sure to clear the following bits to “0”.
SCR00: bits 11, 6, 3
SCR01: bits 11, 6, 5, 3
Be sure to set bit 2 to “1”.
Remark m: Unit number (m = 0), n: Channel number (n = 0, 1), p: CSI number (p = 00, 01)