Datasheet

RL78/L12 CHAPTER 11 A/D CONVERTER
R01UH0330EJ0200 Rev.2.00 350
Dec 13, 2013
11.3.4 A/D converter mode register 2 (ADM2)
This register is used to select the + side or - side reference voltage of the A/D converter, check the upper limit and
lower limit A/D conversion result values, select the resolution, and specify whether to use the SNOOZE mode.
The ADM2 register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 11-7. Format of A/D Converter Mode Register 2 (ADM2) (1/2)
Address: F0010H After reset: 00H R/W
Symbol 7 6 5 4 <3> <2> 1 <0>
ADM2 ADREFP1 ADREFP0 ADREFM 0 ADRCK AWC 0 ADTYP
ADREFP1 ADREFP0 Selection of the + side reference voltage source of the A/D converter
0 0 Supplied from VDD
0 1 Supplied from P20/AVREFP/ANI0
1 0 Supplied from the internal reference voltage (1.45 V)
Note
1 1 Setting prohibited
• When ADREFP1 or ADREFP0 bit is rewritten, this must be configured in accordance with the following procedures.
(1) Set ADCE = 0
(2) Change the values of ADREFP1 and ADREFP0
(3) Stabilization wait time (A)
(4) Set ADCE = 1
(5) Stabilization wait time (B)
When ADREFP1 and ADREFP0 are set to 1 and 0, the setting is changed to A = 5
μ s, B = 1 μ s.
When ADREFP1 and ADREFP0 are set to 0 and 0 or 0 and 1, A needs no wait and B = 1
μ s.
• When ADREFP1 and ADREFP0 are set to 1 and 0, respectively, A/D conversion cannot be performed on the
temperature sensor output and internal reference voltage.
Be sure to perform A/D conversion while ADISS = 0.
ADREFM Selection of the − side reference voltage source of the A/D converter
0 Supplied from VSS
1 Supplied from P21/AVREFM/ANI1
ADRCK Checking the upper limit and lower limit conversion result values
0 The interrupt signal (INTAD) is output when the ADLL register ≤ the ADCR register ≤ the ADUL register
(AREA 1).
1 The interrupt signal (INTAD) is output when the ADCR register < the ADLL register (AREA 2) or the
ADUL register < the ADCR register (AREA 3).
Figure 11-8 shows the generation range of the interrupt signal (INTAD) for <AREA 1> to <AREA 3>.
Note This setting can be used only in HS (high-speed main) mode.
Cautions 1. Rewrite the value of the ADM2 register while conversion is stopped (ADCS = 0, ADCE = 0).
2. Do not set the ADREFP1 bit to 1 when shifting to STOP mode, or to HALT mode while the
CPU is operating on the subsystem clock. Also, if the ADREFP1 bit is set to 1, the
temperature sensor operating current (I
ADREF) indicated in 30.3.2 Supply current
characteristics or 31.3.2 Supply current characteristics will be added to the current
consumption when shifting to HALT mode while the CPU is operating on the main system
clock.
3. When using AV
REFP and AVREFM, specify ANI0 and ANI1 as the analog input channels and
specify input mode by using the port mode register.
<R>
<R>
<R>