Datasheet

RL78/L12 CHAPTER 11 A/D CONVERTER
R01UH0330EJ0200 Rev.2.00 335
Dec 13, 2013
Figure 11-1. Block Diagram of A/D Converter
ADCS FR2 FR1 ADCEFR0
6
ANI18/SEG31/P13
ANI19/SEG32/P14
LV 1 LV0
3
5
ADPC1 ADPC0
ADTES1 ADTES0
2
ADS3ADS4 ADS2 ADS1 ADS0
ADISS
ADREFP0
ADREFP1
ADSCM
ANI22/SEG35/P144 ANI23/SEG36/P145 ANI20/SEG33/P142 ANI21/SEG34/P143
PMCxx
A/D port configuration register (ADPC)
ANI0/AVREFP/P20
ANI1/AV
REFM/P21
A
NI16/TI04/TO04/SEG24/P41
ANI17/SEG25/P120
V
SS
AV
REFP/ANI0/P20
V
DD
AVREFM/ANI1/P21
V
SS
PMCxx
ADREFM
ADRCK AWC
ADTYP
ADTMD1 ADTMD0 ADTRS1 ADTRS0
2
5
Sample & hold circuit
Internal bus
Internal bus
Analog input channel specification register (ADS)
Conversion result
comparison upper limit
setting register (ADUL)
Conversion result
comparison lower limit
setting register (ADLL)
INTAD
A/D conversion result
register (ADCR, ADCRH)
A/D conversion
result upper
limit/lower limit
comparator
Timer trigger signal (INTRTC)
Timer trigger signal (INTIT) Timer trigger signal (INTTM01)
Internal reference voltage (1.45 V)
ADCS bit
ADREFP1 and ADREFP0 bits
A/D converter mode register 2 (ADM2)
A/D voltage comparator
Controller
Successive
approximation register
(SAR)
ADREFM bit
Selector
Comparison
voltage
generator
Selector
Temperature sensor
Internal reference voltage (1.45 V)
Port mode control register (PMC)
A/D test register (ADTES)
A/D converter mode register 1 (ADM1)
Selector
Digital port controlDigital port control
Remark Analog input pin for figure 11-1 when a 64-pin product is used.
<R>