Datasheet

RL78/L12 CHAPTER 8 12-BIT INTERVAL TIMER
R01UH0330EJ0200 Rev.2.00 315
Dec 13, 2013
8.3.2 Subsystem clock supply mode control register (OSMC)
The WUTMMCK0 bit can be used to select the 12-bit interval timer operation clock.
In addition, by stopping clock functions that are unnecessary, the RTCLPC bit can be used to reduce power
consumption. For details about setting the RTCLPC bit, see CHAPTER 5 CLOCK GENERATOR.
The OSMC register can be set by an 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 8-3. Format of Subsystem Clock Supply Mode Control Register (OSMC)
Address: F00F3H After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
OSMC RTCLPC 0 0
WUTMMCK0 0 0 0 0
WUTMMCK0
Note
Selection of operation clock for real-time
clock, 12-bit interval timer, and LCD
river/controller.
Selection of clock output from PCLBUZn pin
of clock output/buzzer output
0 Subsystem clock (fSUB)
Selecting the subsystem clock (f
SUB) is
enabled.
1 Low-speed on-chip oscillator clock (fIL)
Selecting the subsystem clock (f
SUB) is
disabled.
Note Be sure to select the subsystem clock (WUTMMCK0 bit = 0) if the subsystem clock is oscillating.
Caution The subsystem clock and low-speed on-chip oscillator clock can only be switched by
using the WUTMMCK0 bit if the real-time clock, 12-bit interval timer, and LCD
driver/controller are all stopped.
These are stopped as follows:
Real-time clock: Set the RTCE bit to 0.
Interval timer: Set the RINTE bit to 0.
LCD driver/controller: Set the SCOC and VLCON bits to 0.
Remark RTCE: Bit 7 of real-time clock control register 0 (RTCC0)
RINTE: Bit 15 of the interval timer control register (ITMC)
SCOC: Bit 6 of LCD mode register 1 (LCDM1)
VLCON: Bit 5 of LCD mode register 1 (LCDM1)
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