Datasheet

RL78/L12 CHAPTER 7 REAL-TIME CLOCK
R01UH0330EJ0200 Rev.2.00 312
Dec 13, 2013
Figure 7-26. Correcting Operation when (DEV, F6, F5, F4, F3, F2, F1, F0) = (1, 1, 1, 0, 1, 1, 1, 0)
SEC
00 01
7FDBH 0000H 0001H 7FFFH0000H 7FDAH
4019
0000H 0001H 7FFFH 0000H 0001H 7FFFH
20 39
0000H 0001H 7FFFH 0000H 0001H 7FFFH 0000H 0001H 7FFFH
59 00
7FDBH0000H 7FDAH
7FFFH-24H (36)
7FFFH-24H (36)
Count start
Register (16-bit)
count value