Datasheet

RL78/L12 CHAPTER 1 OUTLINE

R01UH0330EJ0200 Rev.2.00 2

Dec 13, 2013

DMA (Direct Memory Access) controller

• 2 channels

• Number of clocks during transfer between 8/16-bit SFR and internal RAM: 2 clocks

Multiplier and divider/multiply-accumulator

• 16 bits × 16 bits = 32 bits (Unsigned or signed)

• 32 bits ÷ 32 bits = 32 bits (Unsigned)

• 16 bits × 16 bits + 32 bits = 32 bits (Unsigned or signed)

LCD controller/driver (internal voltage boosting method (44-, 48-, 52-, 64-pin products only), capacitor split method, and

external resistance division method are switchable)

• Number of segment signal output: 39 (35)

Note

to 13

• Number of common signal output: 4 (8)

Note

Note ( ) indicates the number of signal output pins when 8 com is used.

Serial interface

• CSI: 2 channels

• UART/UART (LIN-bus supported): 1 channel

• I

C/Simplified I

C communication: 1 channel

Timer

• 16-bit timer: 8 channels (remote control output function is only available in the 44-, 48-, 52-, and 64-pin products.)

• 12-bit interval timer: 1 channel

• Real-time clock: 1 channel (calendar for 99 years, alarm function, and clock correction function)

• Watchdog timer: 1 channel (operable with the dedicated low-speed on-chip oscillator)

A/D converter

• 8/10-bit resolution A/D converter (V

DD = 1.6 to 5.5 V)

• Analog input: 4 to 10 channels

• Internal reference voltage (1.45 V) and temperature sensor

Note 1

I/O port

• I/O port: 20 to 47 (N-ch open drain I/O [EV

DD withstand voltage]: 2)

• Can be set to N-ch open drain, TTL input buffer, and on-chip pull-up resistor

• Different potential interface: Can connect to a 1.8/2.5/3 V device

• On-chip key interrupt function

• On-chip clock output/buzzer output controller

Others

• On-chip BCD (binary-coded decimal) correction circuit

Note Can be selected only in HS (high-speed main) mode

Remark The functions mounted depend on the product. See 1.6 Outline of Functions.