Datasheet

RL78/G14 2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C)
R01DS0053EJ0200 Rev. 2.00 Page 98 of 187
Oct 25, 2013
2.5.2 Serial interface IICA
(Notes, Cautions, and Remarks are listed on the next page.)
(1) I
2
C standard mode
(T
A = -40 to +85 C, 1.6 V  EVDD0 = EVDD1  VDD  5.5 V, VSS = EVSS0 = EVSS1 = 0 V)
Parameter Symbol Conditions HS (high-speed main)
mode
LS (low-speed main)
mode
LV (low-voltage main)
mode
Unit
MIN. MAX. MIN. MAX. MIN. MAX.
SCLA0 clock
frequency
f
SCL Standard mode:
f
CLK  1 MHz
2.7 V
 EVDD0  5.5 V 0 100 0 100 0 100 kHz
1.8 V
 EVDD0  5.5 V 0 100 0 100 0 100 kHz
1.7 V
 EVDD0  5.5 V 0 100 0 100 0 100 kHz
1.6 V
 EVDD0  5.5 V — 0 100 0 100 kHz
Setup time of
restart condition
t
SU: STA 2.7 V  EVDD0  5.5 V 4.7 4.7 4.7 s
1.8 V
 EVDD0  5.5 V 4.7 4.7 4.7 s
1.7 V
 EVDD0  5.5 V 4.7 4.7 4.7 s
1.6 V
 EVDD0  5.5 V — 4.7 4.7 s
Hold time
Note 1
tHD: STA 2.7 V  EVDD0  5.5 V 4.0 4.0 4.0 s
1.8 V
 EVDD0  5.5 V 4.0 4.0 4.0 s
1.7 V
 EVDD0  5.5 V 4.0 4.0 4.0 s
1.6 V
 EVDD0  5.5 V — 4.0 4.0 s
Hold time when
SCLA0 = “L”
t
LOW 2.7 V  EVDD0  5.5 V 4.7 4.7 4.7 s
1.8 V
 EVDD0  5.5 V 4.7 4.7 4.7 s
1.7 V
 EVDD0  5.5 V 4.7 4.7 4.7 s
1.6 V
 EVDD0  5.5 V — 4.7 4.7 s
Hold time when
SCLA0 = “H”
t
HIGH 2.7 V  EVDD0  5.5 V 4.0 4.0 4.0 s
1.8 V
 EVDD0  5.5 V 4.0 4.0 4.0 s
1.7 V
 EVDD0  5.5 V 4.0 4.0 4.0 s
1.6 V
 EVDD0  5.5 V — 4.0 4.0 s
(1/2)