Datasheet

RL78/G14 2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C)
R01DS0053EJ0200 Rev. 2.00 Page 52 of 187
Oct 25, 2013
Remark Unless specified otherwise, the characteristics of alternate-function pins are the same as those of the port pins.
(TA = -40 to +85 C, 1.6 V  EVDD0 = EVDD1  VDD  5.5 V, VSS = EVSS0 = EVSS1 = 0 V) (5/5)
Items Symbol Conditions MIN. TYP. MAX. Unit
Input leakage
current, high
I
LIH1 P00 to P06, P10 to P17, P30,
P31, P40 to P47, P50 to P57,
P64 to P67, P70 to P77,
P80 to P87, P100 to P102, P110,
P111, P120, P140 to P147
VI = EVDD0 1 A
I
LIH2
P20 to P27, P137, P150 to P156,
RESET
VI = VDD 1 A
I
LIH3 P121 to P124
(X1, X2, EXCLK, XT1, XT2,
EXCLKS)
VI = VDD In input port or
external clock
input
1 A
In resonator
connection
10 A
Input leakage
current, low
I
LIL1 P00 to P06, P10 to P17, P30,
P31, P40 to P47, P50 to P57,
P64 to P67, P70 to P77,
P80 to P87, P100 to P102, P110,
P111, P120, P140 to P147
VI = EVSS0 -1 A
I
LIL2
P20 to P27, P137, P150 to P156,
RESET
VI = VSS -1 A
I
LIL3 P121 to P124
(X1, X2, EXCLK, XT1, XT2,
EXCLKS)
VI = VSS In input port or
external clock
input
-1 A
In resonator
connection
-10 A
On-chip pull-up
resistance
R
U P00 to P06, P10 to P17, P30,
P31, P40 to P47, P50 to P57,
P64 to P67, P70 to P77,
P80 to P87, P100 to P102, P110,
P111, P120, P140 to P147
VI = EVSS0, In input port 10 20 100 k