Datasheet RL78/G14 R01DS0053EJ0200 Rev. 2.00 Oct 25, 2013 RENESAS MCU True Low Power Platform (as low as 66 A/MHz, and 0.60 A for RTC + LVD), 1.6 V to 5.5 V operation, 16 to 256 Kbyte Flash, 44 DMIPS at 32 MHz, for General Purpose Applications 1. OUTLINE 1.1 Features Ultra-Low Power Technology • 1.6 V to 5.5 V operation from a single supply • Stop (RAM retained): 0.24 A, (LVD enabled): 0.32 A • Halt (RTC + LVD): 0.60 A • Snooze: 0.70 mA (UART), 1.
RL78/G14 1. OUTLINE ROM, RAM capacities RL78/G14 Flash ROM 192 KB Data flash RAM 30 pins 32 pins 36 pins 40 pins 8 KB 20 KB — — — R5F104EH 128 KB 8 KB 16 KB R5F104AG R5F104BG R5F104CG R5F104EG 96 KB 8 KB 12 KB R5F104AF R5F104BF R5F104CF R5F104EF 64 KB 4 KB 5.5 KB Note 1 R5F104AE R5F104BE R5F104CE R5F104EE 48 KB 4 KB 5.5 KB Note 1 R5F104AD R5F104BD R5F104CD R5F104ED 32 KB 4 KB 4 KB R5F104AC R5F104BC R5F104CC R5F104EC 16 KB 4 KB 2.
RL78/G14 1.2 1. OUTLINE Ordering Information Figure 1 - 1 Part Number, Memory Size, and Package of RL78/G14 Part No. R 5 F 1 0 4 L E A x x x F B # V 0 Packaging specification #U0: Tray (HWQFN, WFLGA, FLGA) #V0: Tray (LFQFP, LQFP, LSSOP) #W0: Embossed Tape (HWQFN, WFLGA, FLGA) #X0: Embossed Tape (LFQFP, LQFP, LSSOP) Package type: SP: LSSOP, 0.65 mm pitch FP: LQFP, 0.80 mm pitch FA: LQFP, 0.65 mm pitch FB: LFQFP, 0.50 mm pitch NA:HWQFN, 0.50 mm pitch LA: WFLGA, 0.50 mm pitch Note LA: FLGA, 0.
RL78/G14 1. OUTLINE (1/5) Pin count 30 pins Package Fields of Application Ordering Part Number Note 30-pin plastic LSSOP A (7.62 mm (300), 0.
RL78/G14 1. OUTLINE (2/5) Pin count 40 pins Package Fields of Application Ordering Part Number Note 40-pin plastic HWQFN A (6 6 mm, 0.
RL78/G14 1. OUTLINE (3/5) Pin count 48 pins Package Fields of Application Ordering Part Number Note 48-pin plastic LFQFP A (7 7 mm, 0.
RL78/G14 1. OUTLINE (4/5) Pin count Package Fields of Application Ordering Part Number Note 64 pins 64-pin plastic LQFP A (12 12 mm, 0.
RL78/G14 1. OUTLINE (5/5) Pin count Package Fields of Application Ordering Part Number NoteNote 80 pins 80-pin plastic LFQFP A (12 12 mm, 0.
RL78/G14 1.3 1. OUTLINE Pin Configuration (Top View) 1.3.1 30-pin products • 30-pin plastic LSSOP (7.62 mm (300), 0.
RL78/G14 1.3.2 1. OUTLINE 32-pin products P10/SCK11/SCL11/TRDIOD1 P11/SI11/SDA11/TRDIOC1 P12/SO11/TRDIOB1/IVREF1 Note P13/TxD2/SO20/TRDIOA1/IVCMP1 Note P14/RxD2/SI20/SDA20/TRDIOD0/(SCLA0) P15/PCLBUZ1/SCK20/SCL20/TRDIOB0/(SDAA0) P16/TI01/TO01/INTP5/TRDIOC0/IVREF0 Note/(RXD0) P17/TI02/TO02/TRDIOA0/TRDCLK/IVCMP0 Note/(TXD0) • 32-pin plastic HWQFN (5 5 mm, 0.
RL78/G14 1. OUTLINE P10/SCK11/SCL11/TRDIOD1 P11/SI11/SDA11/TRDIOC1 P12/SO11/TRDIOB1/IVREF1 Note P13/TxD2/SO20/TRDIOA1/IVCMP1 Note P14/RxD2/SI20/SDA20/TRDIOD0/(SCLA0) P15/PCLBUZ1/SCK20/SCL20/TRDIOB0/(SDAA0) P16/TI01/TO01/INTP5/TRDIOC0/IVREF0 Note/(RxD0) P17/TI02/TO02/TRDIOA0/TRDCLK/IVCMP0 Note/(TxD0) • 32-pin plastic LQFP (7 7 mm, 0.
RL78/G14 1.3.3 1. OUTLINE 36-pin products • 36-pin plastic WFLGA (4 × 4 mm, 0.
RL78/G14 1.3.4 1. OUTLINE 40-pin products P147/ANI18/VCOUT1 Note P10/SCK11/SCL11/TRDIOD1 P11/SI11/SDA11/TRDIOC1 P12/SO11/TRDIOB1/IVREF1 Note P13/TxD2/SO20/TRDIOA1/IVCMP1 Note P14/RxD2/SI20/SDA20/TRDIOD0/(SCLA0) P15/PCLBUZ1/SCK20/SCL20/TRDIOB0/(SDAA0) P16/TI01/TO01/INTP5/TRDIOC0/IVREF0 Note/(RXD0) P17/TI02/TO02/TRDIOA0/TRDCLK/IVCMP0 Note/(TXD0) P51/INTP2/SO00/TxD0/TOOLTxD/TRGIOB • 40-pin plastic HWQFN (6 6 mm, 0.
RL78/G14 1.3.5 1. OUTLINE 44-pin products P147/ANI18/VCOUT1 Note P146 P10/SCK11/SCL11/TRDIOD1 P11/SI11/SDA11/TRDIOC1 P12/SO11/TRDIOB1/IVREF1 Note P13/TxD2/SO20/TRDIOA1/IVCMP1 Note P14/RxD2/SI20/SDA20/TRDIOD0/(SCLA0) P15/PCLBUZ1/SCK20/SCL20/TRDIOB0/(SDAA0) P16/TI01/TO01/INTP5/TRDIOC0/IVREF0 Note/(RXD0) P17/TI02/TO02/TRDIOA0/TRDCLK/IVCMP0 Note/(TXD0) P51/INTP2/SO00/TxD0/TOOLTxD/TRGIOB • 44-pin plastic LQFP (10 × 10 mm, 0.
RL78/G14 1.3.6 1.
RL78/G14 1.
RL78/G14 1.3.7 1.
RL78/G14 1.3.8 1. OUTLINE 64-pin products • 64-pin plastic LQFP (14 14 mm, 0.8 mm pitch) • 64-pin plastic LQFP (12 12 mm, 0.
RL78/G14 1. OUTLINE • 64-pin plastic FLGA (5 5 mm, 0.
RL78/G14 1.3.9 1. OUTLINE 80-pin products • 80-pin plastic LQFP (14 14 mm, 0.
RL78/G14 1.3.10 1.
RL78/G14 1. OUTLINE P140/PCLBUZ0/INTP6 P141/PCLBUZ1/INTP7 P142/SCK30/SCL30 P143/SI30/RxD3/SDA30 P144/SO30/TxD3 P145 P00/TI00/TRGCLKA/(TRJO0) P01/TO00/TRGCLKB/TRJIO0 P02/ANI17/SO10/TxD1 P03/ANI16/SI10/RxD1/SDA10 P04/SCK10/SCL10 P102 P130 P20/ANI0/AVREFP P21/ANI1/AVREFM P22/ANI2/ANO0 P23/ANI3/ANO1 P24/ANI4 P25/ANI5 P26/ANI6 P27/ANI7 P150/ANI8 P151/ANI9 P152/ANI10 P153/ANI11 P154/ANI12 P155/ANI13 P156/ANI14 P100/ANI20/(INTP10) P147/ANI18/VCOUT1 • 100-pin plastic LQFP (14 20 mm, 0.
RL78/G14 1.4 1.
RL78/G14 1.5 1.5.1 1.
RL78/G14 1.5.2 1.
RL78/G14 1.5.3 1.
RL78/G14 1.5.4 1.
RL78/G14 1.5.5 1.
RL78/G14 1.5.6 1.
RL78/G14 1.5.7 1.
RL78/G14 1.5.8 1.
RL78/G14 1.5.9 1.
RL78/G14 1.5.10 1.
RL78/G14 1.6 1. OUTLINE Outline of Functions [30-pin, 32-pin, 36-pin, 40-pin products (code flash memory 16 KB to 64 KB)] Caution This outline describes the functions at the time when Peripheral I/O redirection register 0, 1 (PIOR0, 1) are set to 00H. (1/2) 30-pin 32-pin 36-pin 40-pin R5F104Ax (x = A, C to E) R5F104Bx (x = A, C to E) R5F104Cx (x = A, C to E) R5F104Ex (x = A, C to E) Code flash memory (KB) 16 to 64 16 to 64 16 to 64 16 to 64 Data flash memory (KB) 4 4 4 4 2.5 to 5.
RL78/G14 1. OUTLINE (2/2) Item 30-pin 32-pin 36-pin 40-pin R5F104Ax (x = A, C to E) R5F104Bx (x = A, C to E) R5F104Cx (x = A, C to E) R5F104Ex (x = A, C to E) 2 2 2 2 Clock output/buzzer output [30-pin, 32-pin, 36-pin products] • 2.44 kHz, 4.88 kHz, 9.76 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz (Main system clock: fMAIN = 20 MHz operation) [40-pin products] • 2.44 kHz, 4.88 kHz, 9.76 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz (Main system clock: fMAIN = 20 MHz operation) • 256 Hz, 512 Hz, 1.
RL78/G14 1. OUTLINE [30-pin, 32-pin, 36-pin, 40-pin products (code flash memory 96 KB to 256 KB)] Caution This outline describes the functions at the time when Peripheral I/O redirection register 0, 1 (PIOR0, 1) are set to 00H.
RL78/G14 1. OUTLINE (2/2) Item 30-pin 32-pin 36-pin 40-pin R5F104Ax (x = F, G) R5F104Bx (x = F, G) R5F104Cx (x = F, G) R5F104Ex (x = F to H) 2 2 2 2 Clock output/buzzer output [30-pin, 32-pin, 36-pin products] • 2.44 kHz, 4.88 kHz, 9.76 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz (Main system clock: fMAIN = 20 MHz operation) [40-pin products] • 2.44 kHz, 4.88 kHz, 9.76 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz (Main system clock: fMAIN = 20 MHz operation) • 256 Hz, 512 Hz, 1.024 kHz, 2.048 kHz, 4.
RL78/G14 1. OUTLINE [44-pin, 48-pin, 52-pin, 64-pin products (code flash memory 16 KB to 64 KB)] Caution This outline describes the functions at the time when Peripheral I/O redirection register 0, 1 (PIOR0, 1) are set to 00H. (1/2) 44-pin 48-pin 52-pin 64-pin R5F104Fx R5F104Gx R5F104Jx R5F104Lx (x = A, C to E) (x = A, C to E) (x = C to E) (x = C to E) Code flash memory (KB) 16 to 64 16 to 64 32 to 64 32 to 64 Data flash memory (KB) 4 4 4 4 Item RAM (KB) 2.5 to 5.
RL78/G14 1. OUTLINE (2/2) 44-pin Item 48-pin 52-pin 64-pin R5F104Fx R5F104Gx R5F104Jx R5F104Lx (x = A, C to E) (x = A, C to E) (x = C to E) (x = C to E) 2 2 2 2 Clock output/buzzer output • 2.44 kHz, 4.88 kHz, 9.76 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz (Main system clock: fMAIN = 20 MHz operation) • 256 Hz, 512 Hz, 1.024 kHz, 2.048 kHz, 4.096 kHz, 8.192 kHz, 16.384 kHz, 32.768 kHz (Subsystem clock: fSUB = 32.
RL78/G14 1. OUTLINE [44-pin, 48-pin, 52-pin, 64-pin products (code flash memory 96 KB to 256 KB)] Caution This outline describes the functions at the time when Peripheral I/O redirection register 0, 1 (PIOR0, 1) are set to 00H.
RL78/G14 1. OUTLINE (2/2) Item 44-pin 48-pin 52-pin 64-pin R5F104Fx (x = F to H, J) R5F104Gx (x = F to H, J) R5F104Jx (x = F to H, J) R5F104Lx (x = F to H, J) 2 2 2 2 Clock output/buzzer output • 2.44 kHz, 4.88 kHz, 9.76 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz (Main system clock: fMAIN = 20 MHz operation) • 256 Hz, 512 Hz, 1.024 kHz, 2.048 kHz, 4.096 kHz, 8.192 kHz, 16.384 kHz, 32.768 kHz (Subsystem clock: fSUB = 32.
RL78/G14 1. OUTLINE [80-pin, 100-pin products (code flash memory 96 KB to 256 KB)] Caution This outline describes the functions at the time when Peripheral I/O redirection register 0, 1 (PIOR0, 1) are set to 00H.
RL78/G14 1. OUTLINE (2/2) Item 80-pin 100-pin R5F104Mx (x = F to H, J) R5F104Px (x = F to H, J) 2 2 Clock output/buzzer output • 2.44 kHz, 4.88 kHz, 9.76 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz (Main system clock: fMAIN = 20 MHz operation) • 256 Hz, 512 Hz, 1.024 kHz, 2.048 kHz, 4.096 kHz, 8.192 kHz, 16.384 kHz, 32.768 kHz (Subsystem clock: fSUB = 32.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) This chapter describes the electrical specifications for the products “A: Consumer applications (TA = -40 to +85 C)” and “D: Industrial applications (TA = -40 to +85 C)”. Caution 1. The RL78 microcontrollers have an on-chip debug function, which is provided for development and evaluation.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 2.1 Absolute Maximum Ratings Absolute Maximum Ratings Parameter Supply voltage REGC pin input voltage (1/2) Symbols Conditions Ratings Unit -0.5 to +6.5 V EVDD0, EVDD1 EVDD0 = EVDD1 -0.5 to +6.5 V EVSS0, EVSS1 EVSS0 = EVSS1 -0.5 to +0.3 V VIREGC REGC -0.3 to +2.8 V VDD and -0.3 to VDD +0.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 Absolute Maximum Ratings Parameter Output current, high (2/2) Symbols IOH1 Conditions Ratings Unit -40 mA -70 mA -100 mA -0.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 2.2 Oscillator Characteristics 2.2.1 X1, XT1 characteristics (TA = -40 to +85 °C, 1.6 V VDD 5.5 V, VSS = 0 V) Resonator X1 clock oscillation frequency Resonator (fX) Note XT1 clock oscillation frequency (fXT) Note Note Conditions MIN. MAX. Unit Ceramic resonator/ 2.7 V VDD 5.5 V 1.0 20.0 MHz crystal resonator 2.4 V VDD <2.7 V 1.0 16.0 1.8 V VDD < 2.4 V 1.0 8.0 1.6 V VDD < 1.8 V 1.0 4.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 2.3 2.3.1 DC Characteristics Pin characteristics (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Items Output current, high Symbol Note 1 IOH1 Conditions Per pin for P00 to P06, (1/5) MIN. TYP. 1.6 V EVDD0 5.5 V P10 to P17, P30, P31, P40 to P47, P50 to P57, MAX. Unit -10.0 mA Note 2 P64 to P67, P70 to P77, P80 to P87, P100 to P102, P110, P111, P120, P130, P140 to P147 4.0 V EVDD0 5.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Items Output current, low Note 1 Symbol IOL1 Conditions (2/5) MIN. TYP. MAX. Unit Per pin for P00 to P06, 20.0 mA P10 to P17, P30, P31, P40 to P47, P50 to P57, Note 2 P64 to P67, P70 to P77, P80 to P87, P100 to P102, P110, P111, P120, P130, P140 to P147 Per pin for P60 to P63 15.0 mA Note 2 Total of P00 to P04, P40 to P47, 4.0 V EVDD0 5.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Items Input voltage, high Symbol VIH1 Conditions MAX. Unit 0.8 EVDD0 EVDD0 V P01, P03, P04, P10, P14 to P17, TTL input buffer 2.2 EVDD0 V P30, P43, P44, P50, P53 to P55, 4.0 V EVDD0 5.5 V P80, P81, P142, P143 TTL input buffer 2.0 EVDD0 V 1.5 EVDD0 V 0.7 VDD VDD V P00 to P06, P10 to P17, P30, MIN. (3/5) Normal input buffer TYP.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Items Output voltage, high Symbol VOH1 Conditions P00 to P06, P10 to P17, P30, 4.0 V EVDD0 5.5 V, P31, P40 to P47, P50 to P57, P64 to P67, P70 to P77, IOH1 = -10.0 mA 4.0 V EVDD0 5.5 V, P80 to P87, P100 to P102, P110, IOH1 = -3.0 mA P111, P120, P130, P140 to P147 1.8 V EVDD0 5.5 V, MIN. (4/5) TYP. MAX. Unit EVDD0 - 1.5 V EVDD0 - 0.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Items Input leakage Symbol ILIH1 current, high Conditions P00 to P06, P10 to P17, P30, (5/5) MIN. TYP. MAX.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 2.3.2 Supply current characteristics (1) Flash ROM: 16 to 64 KB of 30- to 64-pin products (TA = -40 to +85 C, 1.6 V EVDD0 VDD 5.5 V, VSS = EVSS0 = 0 V) Parameter Supply current Symbol IDD1 (1/2) Conditions Operating HS (high-speed main) mode mode Note 5 MIN. fHOCO = 64 MHz, fIH = 32 MHz Note 3 Basic operation TYP. VDD = 5.0 V 2.4 VDD = 3.0 V 2.4 MAX.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 Note 1. Total current flowing into VDD and EVDD0, including the input leakage current flowing when the level of the input pin is fixed to VDD , EV DD0 or VSS , EVSS0. The values below the MAX. column include the peripheral operation current. However, not including the current flowing into the A/D converter, LVD circuit, I/O port, and on-chip pull-up/pull-down resistors and the current flowing during data flash rewrite. Note 2.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (1) Flash ROM: 16 to 64 KB of 30- to 64-pin products (TA = -40 to +85 C, 1.6 V EVDD0 VDD 5.5 V, VSS = EVSS0 = 0 V) Parameter Symbol Supply current IDD2 Note 1 (2/2) Conditions HALT mode Note 2 MIN. TYP. MAX. Unit mA HS (high-speed main) fHOCO = 64 MHz, VDD = 5.0 V 0.80 3.09 mode Note 7 VDD = 3.0 V 0.80 3.09 fHOCO = 32 MHz, VDD = 5.0 V 0.54 2.40 fIH = 32 MHz Note 4 VDD = 3.0 V 0.54 2.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 Note 1. Total current flowing into VDD and EVDD0, including the input leakage current flowing when the level of the input pin is fixed to VDD , EV DD0 or VSS , EVSS0. The values below the MAX. column include the peripheral operation current. However, not including the current flowing into the A/D converter, LVD circuit, I/O port, and on-chip pull-up/pull-down resistors and the current flowing during data flash rewrite. Note 2.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (2) Flash ROM: 96 to 256 KB of 30- to 100-pin products (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Supply current IDD1 Conditions (1/2) MIN. Operating HS (high-speed main) fHOCO = 64 MHz, mode mode Note 5 fIH = 32 MHz Note 3 TYP. MAX. Basic operation VDD = 5.0 V 2.6 VDD = 3.0 V 2.6 Basic operation VDD = 5.0 V 2.3 VDD = 3.0 V 2.3 Normal operation VDD = 5.0 V 5.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 Note 1. Total current flowing into VDD, EVDD0, and EVDD1, including the input leakage current flowing when the level of the input pin is fixed to VDD, EVDD0, and EVDD1, or VSS, EVSS0, and EV SS1. The values below the MAX. column include the peripheral operation current.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (2) Flash ROM: 96 to 256 KB of 30- to 100-pin products (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol IDD2 current Note 1 Note 2 Supply Conditions HALT mode (2/2) MIN. TYP. MAX. Unit mA HS (high-speed main) fHOCO = 64 MHz, VDD = 5.0 V 0.88 3.32 mode Note 7 fIH = 32 MHz Note 4 VDD = 3.0 V 0.88 3.32 fHOCO = 32 MHz, VDD = 5.0 V 0.62 2.63 fIH = 32 MHz Note 4 VDD = 3.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 Note 1. Total current flowing into VDD, EVDD0, and EVDD1, including the input leakage current flowing when the level of the input pin is fixed to VDD, EVDD0, and EVDD1, or VSS, EVSS0, and EV SS1. The values below the MAX. column include the peripheral operation current.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (3) Peripheral Functions (Common to all products) (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit Low-speed on-chip oscillator operating current IFIL Note 1 0.20 A RTC operating current IRTC Notes 1, 2, 3 0.02 A 12-bit interval timer operating current IIT Notes 1, 2, 4 0.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 Note 5. Current flowing only to the watchdog timer (including the operating current of the low-speed on-chip oscillator). The supply current of the RL78 microcontrollers is the sum of IDD1, IDD2 or IDD3 and IWDT when the watchdog timer is in operation. Note 6. Current flowing only to the A/D converter. The supply current of the RL78 microcontrollers is the sum of IDD1 or IDD2 and Note 7. Current flowing only to the LVD circuit.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 2.4 AC Characteristics (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Items Symbol Conditions (1/2) MIN. Main system HS (high-speed main) 2.7 V VDD 5.5 V 0.03125 (minimum instruction clock (fMAIN) mode 2.4 V VDD < 2.7 V execution time) operation LS (low-speed main) 1.8 V VDD 5.5 V LV (low-voltage main) 1.6 V VDD 5.5 V Instruction cycle TCY TYP. MAX. Unit 1 s 0.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 Minimum Instruction Execution Time during Main System Clock Operation TCY vs VDD (HS (high-speed main) mode) 10 1.0 Cycle time TCY [µs] When the high-speed on-chip oscillator clock is selected During self-programming When high-speed system clock is selected 0.1 0.0625 0.05 0.03125 0.01 0 1.0 2.0 3.0 2.4 2.7 4.0 5.0 5.5 6.0 Supply voltage VDD [V] R01DS0053EJ0200 Rev. 2.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 TCY vs VDD (LS (low-speed main) mode) 10 When the high-speed on-chip oscillator clock is selected Cycle time TCY [µs] 1.0 During self-programming When high-speed system clock is selected 0.125 0.1 0.01 0 1.0 2.0 1.8 3.0 4.0 5.0 5.5 6.0 Supply voltage VDD [V] TCY vs VDD (LV (low-voltage main) mode) 10 Cycle time TCY [µs] 1.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 AC Timing Test Points VIH/VOH VIH/VOH Test points VIL/VOL VIL/VOL External System Clock Timing 1/fEX 1/fEXS tEXL tEXLS tEXH tEXHS EXCLK/EXCLKS TI/TO Timing tTIL tTIH TI00 to TI03, TI10 to TI13 1/fTO TO00 to TO03, TO10 to TO13, TRJIO0, TRJO0, TRDIOA0, TRDIOA1, TRDIOB0, TRDIOB1, TRDIOC0, TRDIOC1, TRDIOD0, TRDIOD1, TRGIOA, TRGIOB R01DS0053EJ0200 Rev. 2.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 tTJIH tTJIL TRJIO tTDIH tTDIL TRDIOA0, TRDIOA1, TRDIOB0, TRDIOB1, TRDIOC0, TRDIOC1, TRDIOD0, TRDIOD1 tTDSIL INTP0 tTGIL tTGIH TRGIOA, TRGIOB R01DS0053EJ0200 Rev. 2.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 Interrupt Request Input Timing tINTL tINTH INTP0 to INTP11 Key Interrupt Input Timing tKR KR0 to KR7 RESET Input Timing tRSL RESET R01DS0053EJ0200 Rev. 2.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 2.5 Peripheral Functions Characteristics AC Timing Test Points VIH/VOH VIH/VOH Test points VIL/VOL VIL/VOL 2.5.1 Serial array unit (1) During communication at same potential (UART mode) (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) LS (low-speed main) LV (low-voltage main) Mode Mode Mode MIN. Transfer rate Note 1 2.4 V EVDD0 5.5 V MAX.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 UART mode connection diagram (during communication at same potential) Rx TxDq RL78 microcontroller User’s device Tx RxDq UART mode bit width (during communication at same potential) (reference) 1/Transfer rate High-/Low-bit width Baud rate error tolerance TxDq RxDq Remark 1. q: UART number (q = 0 to 3), g: PIM and POM number (g = 0, 1, 5, 14) Remark 2.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (2) During communication at same potential (CSI mode) (master mode, SCKp... internal clock output, corresponding CSI00 only) (TA = -40 to +85 C, 2.7 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. 4.0 V EVDD0 5.5 V MAX. LS (low-speed main) mode MIN. LV (low-voltage main) mode MAX. MIN. Unit MAX. SCKp cycle time tKCY1 tKCY1 2/fCLK 83.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (3) During communication at same potential (CSI mode) (master mode, SCKp... internal clock output) (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (4) During communication at same potential (CSI mode) (slave mode, SCKp... external clock input) (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. tKCY2 SCKp cycle SIp setup time (to SCKp↑) tSIK2 Note 1 SIp hold time (from SCKp↑) tKSI2 Note 2 Delay time from SCKp↓ to SOp output tKSO2 Note 2. Note 3. Note 4. Note 5. Caution MIN. MAX.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 Remark 1. p: CSI number (p = 00, 01, 10, 11, 20, 21, 30, 31), m: Unit number (m = 0, 1), n: Channel number (n = 0 to 3), g: PIM number (g = 0, 1, 3 to 5, 14) Remark 2. fMCK: Serial array unit operation clock frequency (Operation clock to be set by the CKSmn bit of serial mode register mn (SMRmn). m: Unit number, n: Channel number (mn = 00 to 03, 10 to 13)) R01DS0053EJ0200 Rev. 2.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (4) During communication at same potential (CSI mode) (slave mode, SCKp... external clock input) (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. SSI00 setup time SSI00 hold time Caution tSSIK tKSSI MAX. LS (low-speed main) mode MIN. (2/2) LV (low-voltage main) mode MAX. MIN. Unit MAX. DAPmn = 0 2.7 V EVDD0 5.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 CSI mode serial transfer timing (during communication at same potential) (When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1.) tKCY1, 2 tKH1, 2 tKL1, 2 SCKp tSIK1, 2 SIp tKSI1, 2 Input data tKSO1, 2 SOp Output data tKSSI tSSIK SSI00 (CSI00 only) CSI mode serial transfer timing (during communication at same potential) (When DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (5) During communication at same potential (simplified I2C mode) (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) HS (high-speed main) mode Parameter Symbol Conditions SCLr clock frequency fSCL 2.7 V EVDD0 5.5 V, Cb = 50 pF, Rb = 2.7 k 1000 Note 1 400 Note 1 400 Note 1 kHz 1.8 V EVDD0 5.5 V, Cb = 100 pF, Rb = 3 k 400 Note 1 400 Note 1 400 Note 1 kHz 1.8 V EVDD0 2.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (5) During communication at same potential (simplified I2C mode) (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter HS (high-speed main) mode Symbol Conditions tSU: DAT 2.7 V EVDD0 5.5 V, Cb = 50 pF, Rb = 2.7 k 1/fMCK + 85 Note 2 1/fMCK + 145 Note 2 1/fMCK + 145 Note 2 ns 1.8 V EVDD0 5.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 Simplified I2C mode connection diagram (during communication at same potential) VDD Rb SDAr SDA RL78 microcontroller User’s device SCLr SCL Simplified I2C mode serial transfer timing (during communication at same potential) 1/fSCL tLOW tHIGH SCLr SDAr tHD: DAT tSU: DAT Remark 1. Rb[]: Communication line (SDAr) pull-up resistance, Cb[F]: Communication line (SDAr, SCLr) load capacitance Remark 2.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (6) Communication at different potential (1.8 V, 2.5 V, 3 V) (UART mode) (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. Transfer rate reception 4.0 V EVDD0 5.5 V, MAX. LS (low-speed main) mode MIN. MAX. (1/2) LV (low-voltage main) mode MIN. Unit MAX. fMCK/6 Note 1 fMCK/6 Note 1 fMCK/6 Note 1 bps 5.3 1.3 0.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (6) Communication at different potential (1.8 V, 2.5 V, 3 V) (UART mode) (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. Transfer rate transmission 4.0 V EVDD0 5.5 V, MAX. (2/2) LS (low-speed main) mode MIN. MAX. LV (low-voltage main) mode MIN. Unit MAX. Note 1 Note 1 Note 1 bps 2.8 Note 2 2.8 Note 2 2.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 Note 6. The smaller maximum transfer rate derived by using fMCK/6 or the following expression is the valid maximum transfer rate. Expression for calculating the transfer rate when 1.8 V EVDD0 < 3.3 V and 1.6 V Vb 2.0 V 1 Maximum transfer rate = [bps] {-Cb Rb In (1 - 1.5 Vb )} 3 1 Transfer rate 2 - {-Cb Rb In (1 - 1.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 UART mode connection diagram (during communication at different potential) Vb Rb Rx TxDq RL78 microcontroller User’s device Tx RxDq UART mode bit width (during communication at different potential) (reference) 1/Transfer rate Low-bit width High-bit width Baud rate error tolerance TxDq 1/Transfer rate High-/Low-bit width Baud rate error tolerance RxDq Remark 1.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (7) Communication at different potential (2.5 V, 3 V) (CSI mode) (master mode, SCKp... internal clock output, corresponding CSI00 only) (TA = -40 to +85 C, 2.7 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. SCKp cycle time tKCY1 tKCY1 2/fCLK 4.0 V EVDD0 5.5 V, MAX. (1/2) LS (low-speed main) mode MIN. MAX. LV (low-voltage main) mode MIN. Unit MAX.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (7) Communication at different potential (2.5 V, 3 V) (CSI mode) (master mode, SCKp... internal clock output, corresponding CSI00 only) (TA = -40 to +85 C, 2.7 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. SIp setup time tSIK1 4.0 V EVDD0 5.5 V, MAX. LS (low-speed main) mode MIN. MAX. (2/2) LV (low-voltage main) mode MIN. Unit MAX.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (8) Communication at different potential (1.8 V, 2.5 V, 3 V) (CSI mode) (master mode, SCKp... internal clock output) (TA = -40 to +85 C, 1.8 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. SCKp cycle time tKCY1 tKCY1 4/fCLK MAX. (1/3) LS (low-speed main) mode MIN. MAX. LV (low-voltage main) mode MIN. Unit MAX. 4.0 V EVDD0 5.5 V, 2.7 V Vb 4.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (8) Communication at different potential (1.8 V, 2.5 V, 3 V) (CSI mode) (master mode, SCKp... internal clock output) (TA = -40 to +85 C, 1.8 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. SIp setup time tSIK1 (to SCKp↑) Note 1 MAX. LS (low-speed main) mode MIN. MAX. (2/3) LV (low-voltage main) mode MIN. Unit MAX. 4.0 V EVDD0 5.5 V, 2.7 V Vb 4.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (8) Communication at different potential (1.8 V, 2.5 V, 3 V) (CSI mode) (master mode, SCKp... internal clock output) (TA = -40 to +85 C, 1.8 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. SIp setup time tSIK1 (to SCKp↓) Note 1 MAX. LS (low-speed main) mode MIN. MAX. (3/3) LV (low-voltage main) mode MIN. Unit MAX. 4.0 V EVDD0 5.5 V, 2.7 V Vb 4.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 CSI mode connection diagram (during communication at different potential Vb Vb Rb SCKp RL78 microcontroller Rb SCK SIp SO SOp SI User’s device Remark 1. Rb[]: Communication line (SCKp, SOp) pull-up resistance, Cb[F]: Communication line (SCKp, SOp) load capacitance, Vb[V]: Communication line voltage Remark 2.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 CSI mode serial transfer timing (master mode) (during communication at different potential) (When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1.) tKCY1 tKL1 tKH1 SCKp tSIK1 tKSI1 Input data SIp tKSO1 SOp Output data CSI mode serial transfer timing (master mode) (during communication at different potential) (When DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (9) Communication at different potential (1.8 V, 2.5 V, 3 V) (CSI mode) (slave mode, SCKp... external clock input) (TA = -40 to +85 C, 1.8 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter SCKp cycle time Symbol tKCY2 Note 1 Conditions 4.0 V EVDD0 5.5 V, 2.7 V Vb 4.0 V tSIK2 MIN. MIN. MAX. MAX. MAX.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 Note 3. Transfer rate in the SNOOZE mode: MAX. 1 Mbps Use it with EVDD0 Vb. When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The SIp setup time becomes “to SCKp↓” when Note 4. DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0. When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The SIp hold time becomes “from SCKp↓” when Note 5. DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 CSI mode serial transfer timing (slave mode) (during communication at different potential) (When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1.) tKCY2 tKL2 tKH2 SCKp tSIK2 tKSI2 Input data SIp tKSO2 SOp Output data CSI mode serial transfer timing (slave mode) (during communication at different potential) (When DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (10) Communication at different potential (1.8 V, 2.5 V, 3 V) (simplified I2C mode) (TA = -40 to +85 C, 1.8 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. SCLr clock frequency fSCL MAX. LS (low-speed main) mode MIN. MAX. (1/2) LV (low-voltage main) mode MIN. Unit MAX. 4.0 V EVDD0 5.5 V, 2.7 V Vb 4.0 V, Cb = 50 pF, Rb = 2.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (10) Communication at different potential (1.8 V, 2.5 V, 3 V) (simplified I2C mode) (TA = -40 to +85 C, 1.8 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. Data setup time (reception) tSU:DAT LS (low-speed main) mode MAX. MIN. MAX. (2/2) LV (low-voltage main) mode MIN. Unit MAX. 4.0 V EVDD0 5.5 V, 2.7 V Vb 4.0 V, Cb = 50 pF, Rb = 2.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 Simplified I2C mode connection diagram (during communication at different potential) Vb Vb Rb Rb SDA SDAr RL78 microcontroller User’s device SCL SCLr Simplified I2C mode serial transfer timing (during communication at different potential) 1/fSCL tLOW tHIGH SCLr SDAr tHD: DAT tSU: DAT Remark 1.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 2.5.2 Serial interface IICA (1) I2C standard mode (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter SCLA0 clock frequency Symbol fSCL Conditions Standard mode: fCLK 1 MHz HS (high-speed main) mode tSU: STA tHD: STA MAX. MIN. MAX. MIN. MAX. 0 100 0 100 0 100 kHz 1.8 V EVDD0 5.5 V 0 100 0 100 0 100 kHz 1.7 V EVDD0 5.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (1) I2C standard mode (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. Data setup time (reception) tSU: DAT tHD: DAT Note 2 tSU: STO tBUF MIN. MAX. 250 250 ns 1.8 V EVDD0 5.5 V 250 250 250 ns 1.7 V EVDD0 5.5 V 250 250 250 ns — 250 250 ns 2.7 V EVDD0 5.5 V 0 3.45 0 3.45 0 3.45 s 1.8 V EVDD0 5.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (2) I2C fast mode (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions 2.7 V EVDD0 5.5 V HS (high-speed main) mode LS (low-speed main) mode LV (low-voltage main) mode Unit MIN. MAX. MIN. MAX. MIN. MAX. 0 400 0 400 0 400 kHz 0 400 0 400 0 400 kHz SCLA0 clock frequency fSCL Fast mode: fCLK 3.5 MHz Setup time of restart condition tSU: STA 2.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (3) I2C fast mode plus (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions 2.7 V EVDD0 5.5 V SCLA0 clock frequency fSCL Fast mode plus: fCLK 10 MHz Setup time of restart condition tSU: STA 2.7 V EVDD0 5.5 V Hold time Note 1 tHD: STA 2.7 V EVDD0 5.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 2.6 Analog Characteristics 2.6.1 A/D converter characteristics Classification of A/D converter characteristics Reference Voltage Input channel ANI0 to ANI14 Reference voltage (+) = AVREFP Reference voltage (-) = AVREFM Refer to 2.6.1 (1). ANI16 to ANI20 Refer to 2.6.1 (2). Internal reference voltage Temperature sensor output voltage Refer to 2.6.1 (1). Reference voltage (+) = VDD Reference voltage (-) = VSS Refer to 2.6.1 (3).
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (2) When reference voltage (+) = AVREFP/ANI0 (ADREFP1 = 0, ADREFP0 = 1), reference voltage (-) = AVREFM/ANI1 (ADREFM = 1), target pin: ANI16 to ANI20 (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, 1.6 V AVREFP VDD 5.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (3) When reference voltage (+) = VDD (ADREFP1 = 0, ADREFP0 = 0), reference voltage (-) = VSS (ADREFM = 0), target pin: ANI0 to ANI14, ANI16 to ANI20, internal reference voltage, and temperature sensor output voltage (TA = -40 to +85 °C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V, Reference voltage (+) = VDD, Reference voltage (-) = VSS) Parameter Resolution Overall error Symbol Conditions MIN. TYP. MAX. 10 bit 1.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (4) When reference voltage (+) = Internal reference voltage (ADREFP1 = 1, ADREFP0 = 0), reference voltage (-) = AVREFM/ANI1 (ADREFM = 1), target pin: ANI0, ANI2 to ANI14, ANI16 to ANI20 (TA = -40 to +85 °C, 2.4 V VDD 5.5 V, 1.6 V EVDD = EVDD1 VDD, VSS = EVSS0 = EVSS1 = 0 V, Reference voltage (+) = VBGR Note 3, Reference voltage (-) = AVREFM = 0 V Note 4, HS (high-speed main) mode) Parameter Symbol Resolution Conditions MIN. TYP.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 2.6.2 Temperature sensor characteristics/internal reference voltage characteristic (TA = -40 to +85 °C, 2.4 V VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V, HS (high-speed main) mode) Parameter Symbol Conditions MIN.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 2.6.4 Comparator (TA = -40 to +85 C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Input voltage range Conditions MIN. Ivref Ivcmp Output delay td VDD = 3.0 V Input slew rate > 50 mV/s MAX. Unit 0 TYP. EVDD0 - 1.4 V -0.3 EVDD0 + 0.3 V Comparator high-speed mode, standard mode 1.2 s Comparator high-speed mode, window mode 2.0 s 5.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 2.6.6 LVD circuit characteristics (1) LVD Detection Voltage of Reset Mode and Interrupt Mode (TA = -40 to +85 C, VPDR VDD 5.5 V, VSS = 0 V) Parameter Detection voltage Supply voltage level Symbol VLVD0 VLVD1 VLVD2 VLVD3 VLVD4 VLVD5 VLVD6 VLVD7 VLVD8 VLVD9 VLVD10 VLVD11 VLVD12 VLVD13 Minimum pulse width Detection delay time R01DS0053EJ0200 Rev. 2.00 Oct 25, 2013 tLW MIN. TYP. MAX.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 (2) LVD Detection Voltage of Interrupt & Reset Mode (TA = -40 to +85 C, VPDR VDD 5.5 V, VSS = 0 V) Parameter Interrupt and reset mode Symbol VLVDA0 Conditions VLVDA1 LVIS1, LVIS0 = 1, 0 VLVDA2 LVIS1, LVIS0 = 0, 1 VLVDA3 VLVDB0 LVIS1, LVIS0 = 0, 0 TYP. MAX. Unit 1.60 1.63 1.66 V Rising release reset voltage 1.74 1.77 1.81 V Falling interrupt voltage 1.70 1.73 1.77 V Rising release reset voltage 1.84 1.88 1.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 2.7 Data Memory STOP Mode Low Supply Voltage Data Retention Characteristics (TA = -40 to +85 C, VSS = 0V)) Parameter Data retention supply voltage Symbol Conditions MIN. TYP. MAX. Unit 5.5 V 1.46 Note VDDDR The value depends on the POR detection voltage. When the voltage drops, the data is retained before a POR reset is Note effected, but data is not retained when a POR reset is effected.
2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85 C) RL78/G14 2.10 Timing for Switching Flash Memory Programming Modes (TA = -40 to +85 C, 1.8 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit 100 ms How long from when an external reset ends until the initial communication settings are specified tSUINIT POR and LVD reset must end before the external reset ends.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) This chapter describes the electrical specifications for the products “G: Industrial applications (TA = -40 to +105 C)”. Caution 1. The RL78 microcontrollers have an on-chip debug function, which is provided for development and evaluation.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 3.1 Absolute Maximum Ratings Absolute Maximum Ratings Parameter Supply voltage REGC pin input voltage (1/2) Symbols Conditions Ratings Unit -0.5 to +6.5 V EVDD0, EVDD1 EVDD0 = EVDD1 -0.5 to +6.5 V EVSS0, EVSS1 EVSS0 = EVSS1 -0.5 to +0.3 V VIREGC REGC -0.3 to +2.8 V VDD and -0.3 to VDD +0.
3.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 3.2 3.2.1 Oscillator Characteristics X1, XT1 characteristics (TA = -40 to +105 °C, 2.4 V VDD 5.5 V, VSS = 0 V) Resonator X1 clock oscillation frequency Resonator (fX) Note XT1 clock oscillation frequency (fXT) Note Ceramic resonator/ crystal resonator Conditions MIN. MAX. Unit 2.7 V VDD 5.5 V 1.0 20.0 MHz 2.4 V VDD <2.7 V 1.0 16.0 Crystal resonator 32 TYP. 32.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 3.3 3.3.1 DC Characteristics Pin characteristics (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Items Output current, high Symbol Note 1 IOH1 Conditions Per pin for P00 to P06, P10 to P17, P30, P31, P40 to P47, P50 to P57, P64 to P67, P70 to P77, MIN. (1/5) TYP. 2.4 V EVDD0 5.5 V MAX. Unit -3.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Items Output current, low Note 1 Symbol IOL1 Conditions (2/5) MIN. TYP. Per pin for P00 to P06, P10 to P17, P30, P31, P40 to P47, P50 to P57, P64 to P67, P70 to P77, P80 to P87, P100 to P102, P110, P111, P120, P130, P140 to P147 MAX. Unit 8.5 mA Note 2 Per pin for P60 to P63 15.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Items Input voltage, high Input voltage, low Caution Symbol Conditions MIN. (3/5) TYP. MAX. Unit 0.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Items Output voltage, high Output voltage, low Caution Symbol VOH1 Conditions P00 to P06, P10 to P17, P30, P31, P40 to P47, P50 to P57, P64 to P67, P70 to P77, P80 to P87, P100 to P102, P110, P111, P120, P130, P140 to P147 4.0 V EVDD0 5.5 V, MIN. (4/5) TYP. MAX. Unit EVDD0 - 0.7 V 2.7 V EVDD0 5.5 V, IOH1 = -2.0 mA EVDD0 - 0.6 V 2.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Items Input leakage current, high Input leakage current, low On-chip pull-up resistance Remark Symbol Conditions (5/5) MIN. TYP. MAX.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 3.3.2 Supply current characteristics (1) Flash ROM: 16 to 64 KB of 30- to 64-pin products (TA = -40 to +105 C, 2.4 V EVDD0 VDD 5.5 V, VSS = EVSS0 = 0 V) Parameter Supply current IDD1 (1/2) Conditions Symbol Operating HS (high-speed main) mode mode Note 5 MIN. fHOCO = 64 MHz, fIH = 32 MHz Note 3 TYP. MAX. Basic operation VDD = 5.0 V 2.4 VDD = 3.0 V 2.4 Basic operation VDD = 5.0 V 2.1 VDD = 3.0 V 2.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 Note 1. Total current flowing into VDD and EVDD0, including the input leakage current flowing when the level of the input pin is fixed to VDD , EV DD0 or V SS , EVSS0 . The values below the MAX. column include the peripheral operation current. However, not including the current flowing into the A/D converter, LVD circuit, I/O port, and on-chip pull-up/pull-down resistors and the current flowing during data flash rewrite. Note 2.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (1) Flash ROM: 16 to 64 KB of 30- to 64-pin products (TA = -40 to +105 C, 2.4 V EVDD0 VDD 5.5 V, VSS = EVSS0 = 0 V) Parameter Symbol Supply current IDD2 Note 1 (2/2) Conditions HALT mode Note 2 MIN. TYP. MAX. Unit mA HS (high-speed main) fHOCO = 64 MHz, VDD = 5.0 V 0.80 4.36 mode Note 7 VDD = 3.0 V 0.80 4.36 fHOCO = 32 MHz, VDD = 5.0 V 0.54 3.67 fIH = 32 MHz Note 4 VDD = 3.0 V 0.54 3.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 Note 1. Total current flowing into VDD and EVDD0, including the input leakage current flowing when the level of the input pin is fixed to VDD , EV DD0 or V SS , EVSS0 . The values below the MAX. column include the peripheral operation current. However, not including the current flowing into the A/D converter, LVD circuit, I/O port, and on-chip pull-up/pull-down resistors and the current flowing during data flash rewrite. Note 2.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (2) Flash ROM: 96 to 256 KB of 30- to 100-pin products (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Supply current IDD1 Conditions (1/2) MIN. Operating HS (high-speed main) fHOCO = 64 MHz, mode mode Note 5 fIH = 32 MHz Note 3 Basic operation TYP. VDD = 5.0 V 2.6 VDD = 3.0 V 2.6 MAX.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 Note 1. Total current flowing into VDD, EVDD0, and EVDD1, including the input leakage current flowing when the level of the input pin is fixed to VDD, EVDD0, and EVDD1, or VSS, EVSS0, and EV SS1. The values below the MAX. column include the peripheral operation current.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (2) Flash ROM: 96 to 256 KB of 30- to 100-pin products (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Supply IDD2 current Note 1 Note 2 Conditions HALT mode (2/2) MIN. TYP. MAX. Unit mA HS (high-speed main) fHOCO = 64 MHz, VDD = 5.0 V 0.88 4.86 mode Note 7 fIH = 32 MHz Note 4 VDD = 3.0 V 0.88 4.86 fHOCO = 32 MHz, VDD = 5.0 V 0.62 4.17 fIH = 32 MHz Note 4 VDD = 3.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 Note 1. Total current flowing into VDD, EVDD0, and EVDD1, including the input leakage current flowing when the level of the input pin is fixed to VDD, EVDD0, and EVDD1, or VSS, EVSS0, and EV SS1. The values below the MAX. column include the peripheral operation current.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (3) Peripheral Functions (Common to all products) (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit Low-speed on-chip oscillator operating current IFIL Note 1 0.20 A RTC operating current IRTC Notes 1, 2, 3 0.02 A 12-bit interval timer operating current IIT Notes 1, 2, 4 0.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 Note 5. Current flowing only to the watchdog timer (including the operating current of the low-speed on-chip oscillator). The supply current of the RL78 microcontrollers is the sum of IDD1, IDD2 or IDD3 and IWDT when the watchdog timer is in operation. Note 6. Current flowing only to the A/D converter.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 3.4 AC Characteristics (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Items Instruction cycle (minimum instruction execution time) Symbol TCY Conditions Main system clock (fMAIN) (1/2) MIN. HS (high-speed main) 2.7 V VDD 5.5 V mode 2.4 V VDD < 2.7 V operation Unit 0.03125 1 s 0.0625 1 s 31.3 s 0.03125 1 s 0.0625 1 s 2.7 V VDD 5.5 V 1.0 20.0 MHz 2.4 V VDD 2.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Items Symbol Conditions Timer RD input high-level width, low-level width tTDIH, tTDIL TRDIOA0, TRDIOA1, TRDIOB0, TRDIOB1, TRDIOC0, TRDIOC1, TRDIOD0, TRDIOD1 Timer RD forced cutoff signal input low-level width tTDSIL P130/INTP0 Timer RG input high-level width, low-level width TO00 to TO03, TO10 to TO13, tTGIH, TRGIOA, TRGIOB MIN. TYP. MAX.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 Minimum Instruction Execution Time during Main System Clock Operation TCY vs VDD (HS (high-speed main) mode) 10 1.0 Cycle time TCY [µs] When the high-speed on-chip oscillator clock is selected During self-programming When high-speed system clock is selected 0.1 0.0625 0.05 0.03125 0.01 0 1.0 2.0 3.0 2.4 2.7 4.0 5.0 5.5 6.0 Supply voltage VDD [V] R01DS0053EJ0200 Rev. 2.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 AC Timing Test Points VIH/VOH VIH/VOH Test points VIL/VOL VIL/VOL External System Clock Timing 1/fEX 1/fEXS tEXL tEXLS tEXH tEXHS EXCLK/EXCLKS TI/TO Timing tTIL tTIH TI00 to TI03, TI10 to TI13 1/fTO TO00 to TO03, TO10 to TO13, TRJIO0, TRJO0, TRDIOA0, TRDIOA1, TRDIOB0, TRDIOB1, TRDIOC0, TRDIOC1, TRDIOD0, TRDIOD1, TRGIOA, TRGIOB R01DS0053EJ0200 Rev. 2.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 tTJIH tTJIL TRJIO tTDIH tTDIL TRDIOA0, TRDIOA1, TRDIOB0, TRDIOB1, TRDIOC0, TRDIOC1, TRDIOD0, TRDIOD1 tTDSIL INTP0 tTGIL tTGIH TRGIOA, TRGIOB R01DS0053EJ0200 Rev. 2.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 Interrupt Request Input Timing tINTL tINTH INTP0 to INTP11 Key Interrupt Input Timing tKR KR0 to KR7 RESET Input Timing tRSL RESET R01DS0053EJ0200 Rev. 2.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 3.5 Peripheral Functions Characteristics AC Timing Test Points VIH/VOH VIH/VOH Test points VIL/VOL VIL/VOL 3.5.1 Serial array unit (1) During communication at same potential (UART mode) (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) Mode MIN. Transfer rate Note 1 2.4 V EVDD0 5.5 V MAX. fMCK/12 Note 2 bps 2.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (2) During communication at same potential (CSI mode) (master mode, SCKp... internal clock output) (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. SCKp cycle time tKCY1 SCKp high-/low-level width tKH1, tKL1 tKCY1 4/fCLK 2.7 V EVDD0 5.5 V 2.4 V EVDD0 5.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (3) During communication at same potential (CSI mode) (slave mode, SCKp... external clock input) (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions MIN. SCKp cycle time tKCY2 Note 5 4.0 V EVDD0 5.5 V tKH2, tKL2 SIp setup time (to SCKp↑) Note 1 SIp hold time (from SCKp↑) Note 2 tSIK2 MAX.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (3) During communication at same potential (CSI mode) (slave mode, SCKp... external clock input) (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions MIN. SSI00 setup time DAPmn = 0 tSSIK DAPmn = 1 SSI00 hold time DAPmn = 0 tKSSI DAPmn = 1 Caution (2/2) HS (high-speed main) mode Unit MAX. 2.7 V EVDD0 5.5 V 240 ns 2.4 V EVDD0 5.5 V 400 ns 2.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 CSI mode serial transfer timing (during communication at same potential) (When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1.) tKCY1, 2 tKH1, 2 tKL1, 2 SCKp tSIK1, 2 SIp tKSI1, 2 Input data tKSO1, 2 SOp Output data tKSSI tSSIK SSI00 (CSI00 only) CSI mode serial transfer timing (during communication at same potential) (When DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (4) During communication at same potential (simplified I2C mode) (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. SCLr clock frequency Hold time when SCLr = “L” Hold time when SCLr = “H” Data setup time (reception) Data hold time (transmission) fSCL tLOW tHIGH tSU: DAT tHD: DAT 2.7 V EVDD0 5.5 V, Cb = 50 pF, Rb = 2.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 Simplified I2C mode connection diagram (during communication at same potential) VDD Rb SDA SDAr RL78 microcontroller User’s device SCL SCLr Simplified I2C mode serial transfer timing (during communication at same potential) 1/fSCL tLOW tHIGH SCLr SDAr tHD: DAT tSU: DAT Remark 1. Rb[]: Communication line (SDAr) pull-up resistance, Cb[F]: Communication line (SDAr, SCLr) load capacitance Remark 2.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (5) Communication at different potential (1.8 V, 2.5 V, 3 V) (UART mode) (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions MIN. Transfer rate reception (1/2) HS (high-speed main) mode 4.0 V EVDD0 5.5 V, Unit MAX. fMCK/12 Note 1 bps 2.6 Mbps fMCK/12 Note 1 bps 2.6 Mbps fMCK/12 Notes 1, 2 bps 2.6 Mbps 2.7 V Vb 4.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (5) Communication at different potential (1.8 V, 2.5 V, 3 V) (UART mode) (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions (2/2) HS (high-speed main) mode MIN. Transfer rate transmission Unit MAX. 4.0 V EVDD0 5.5 V, Note 1 bps 2.6 Note 2 Mbps Note 3 bps 1.2 Note 4 Mbps Note 5 bps 0.43 Note 6 Mbps 2.7 V Vb 4.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 Note 5. The smaller maximum transfer rate derived by using fMCK/12 or the following expression is the valid maximum transfer rate. Expression for calculating the transfer rate when 2.4 V EVDD0 < 3.3 V and 1.6 V Vb 2.0 V 1 Maximum transfer rate = [bps] {-Cb Rb In (1 - 1.5 Vb )} 3 1 Transfer rate 2 - {-Cb Rb In (1 - 1.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 UART mode connection diagram (during communication at different potential) Vb Rb Rx TxDq RL78 microcontroller User’s device Tx RxDq UART mode bit width (during communication at different potential) (reference) 1/Transfer rate Low-bit width High-bit width Baud rate error tolerance TxDq 1/Transfer rate High-/Low-bit width Baud rate error tolerance RxDq Remark 1.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (6) Communication at different potential (1.8 V, 2.5 V, 3 V) (CSI mode) (master mode, SCKp... internal clock output) (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. SCKp cycle time SCKp high-level width SCKp low-level width Caution tKCY1 tKH1 tKL1 tKCY1 4/fCLK (1/3) Unit MAX. 4.0 V EVDD0 5.5 V, 2.7 V Vb 4.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (6) Communication at different potential (1.8 V, 2.5 V, 3 V) (CSI mode) (master mode, SCKp... internal clock output) (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. SIp setup time (to SCKp↑) Note SIp hold time (from SCKp↑) Note Delay time from SCKp↓ to SOp output Note tSIK1 tKSI1 tKSO1 (2/3) Unit MAX. 4.0 V EVDD0 5.5 V, 2.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (6) Communication at different potential (1.8 V, 2.5 V, 3 V) (CSI mode) (master mode, SCKp... internal clock output) (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. SIp setup time (to SCKp↓) Note SIp hold time (from SCKp↓) Note Delay time from SCKp↑ to SOp output Note tSIK1 tKSI1 tKSO1 (3/3) Unit MAX. 4.0 V EVDD0 5.5 V, 2.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 CSI mode connection diagram (during communication at different potential Vb Vb Rb SCKp RL78 microcontroller Rb SCK SIp SO SOp SI User’s device Remark 5. Rb[]: Communication line (SCKp, SOp) pull-up resistance, Cb[F]: Communication line (SCKp, SOp) load capacitance, Vb[V]: Communication line voltage Remark 6.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 CSI mode serial transfer timing (master mode) (during communication at different potential) (When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1.) tKCY1 tKL1 tKH1 SCKp tSIK1 tKSI1 Input data SIp tKSO1 SOp Output data CSI mode serial transfer timing (master mode) (during communication at different potential) (When DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (7) Communication at different potential (1.8 V, 2.5 V, 3 V) (CSI mode) (slave mode, SCKp... external clock input) (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. SCKp cycle time Note 1 tKCY2 4.0 V EVDD0 5.5 V, 2.7 V Vb 4.0 V 2.7 V EVDD0 4.0 V, 2.3 V Vb 2.7 V 2.4 V EVDD0 3.3 V, 1.6 V Vb 2.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 Note 1. Transfer rate in the SNOOZE mode: MAX. 1 Mbps Note 2. When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The SIp setup time becomes “to SCKp↓” when DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0. Note 3. When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The SIp hold time becomes “from SCKp↓” when DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0. Note 4.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 CSI mode serial transfer timing (slave mode) (during communication at different potential) (When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1.) tKCY2 tKL2 tKH2 SCKp tSIK2 tKSI2 Input data SIp tKSO2 SOp Output data CSI mode serial transfer timing (slave mode) (during communication at different potential) (When DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (8) Communication at different potential (1.8 V, 2.5 V, 3 V) (simplified I2C mode) (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. SCLr clock frequency Hold time when SCLr = “L” Hold time when SCLr = “H” R01DS0053EJ0200 Rev. 2.00 Oct 25, 2013 fSCL tLOW tHIGH (1/2) Unit MAX. 4.0 V EVDD0 5.5 V, 2.7 V Vb 4.0 V, Cb = 50 pF, Rb = 2.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (8) Communication at different potential (1.8 V, 2.5 V, 3 V) (simplified I2C mode) (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode MIN. Data setup time (reception) Data hold time (transmission) tSU:DAT tHD:DAT (2/2) Unit MAX. 4.0 V EVDD0 5.5 V, 2.7 V Vb 4.0 V, Cb = 50 pF, Rb = 2.7 k 1/fMCK + 340 Note 2 ns 2.7 V EVDD0 < 4.0 V, 2.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 Simplified I2C mode connection diagram (during communication at different potential) Vb Vb Rb Rb SDA SDAr RL78 microcontroller User’s device SCL SCLr Simplified I2C mode serial transfer timing (during communication at different potential) 1/fSCL tLOW tHIGH SCLr SDAr tHD: DAT tSU: DAT Remark 1.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 3.5.2 Serial interface IICA (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) mode Standard mode Fast mode: fCLK 3.5 MHz Unit Fast mode MIN. MAX. MIN. MAX. — — 0 400 kHz 0 100 — — kHz SCLA0 clock frequency fSCL Setup time of restart condition tSU: STA 4.7 0.6 s Hold time Note 1 tHD: STA 4.0 0.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 3.6 Analog Characteristics 3.6.1 A/D converter characteristics Classification of A/D converter characteristics Reference Voltage Reference voltage (+) = AVREFP Reference voltage (-) = AVREFM Input channel ANI0 to ANI14 Refer to 3.6.1 (1). ANI16 to ANI20 Refer to 3.6.1 (2). Internal reference voltage Temperature sensor output voltage Refer to 3.6.1 (1). Reference voltage (+) = VDD Reference voltage (-) = VSS Refer to 3.6.1 (3).
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (2) When reference voltage (+) = AVREFP/ANI0 (ADREFP1 = 0, ADREFP0 = 1), reference voltage (-) = AVREFM/ANI1 (ADREFM = 1), target pin: ANI16 to ANI20 (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, 2.4 V AVREFP VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V, Reference voltage (+) = AVREFP, Reference voltage (-) = AVREFM = 0 V) Parameter Symbol Resolution RES Overall error Note 1 AINL Conditions MIN. TYP. MAX.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (3) When reference voltage (+) = VDD (ADREFP1 = 0, ADREFP0 = 0), reference voltage (-) = VSS (ADREFM = 0), target pin: ANI0 to ANI14, ANI16 to ANI20, internal reference voltage, and temperature sensor output voltage (TA = -40 to +105 °C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V, Reference voltage (+) = VDD, Reference voltage (-) = VSS) Parameter Resolution Overall error Symbol Conditions MIN.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (4) When reference voltage (+) = Internal reference voltage (ADREFP1 = 1, ADREFP0 = 0), reference voltage (-) = AVREFM/ANI1 (ADREFM = 1), target pin: ANI0, ANI2 to ANI14, ANI16 to ANI20 (TA = -40 to +105 °C, 2.4 V VDD 5.5 V, 1.6 V EVDD = EVDD1 VDD, VSS = EVSS0 = EVSS1 = 0 V, Reference voltage (+) = VBGR Note 3, Reference voltage (-) = AVREFM = 0 V Note 4, HS (high-speed main) mode) Parameter Symbol Resolution Conditions MIN. TYP.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 3.6.2 Temperature sensor characteristics/internal reference voltage characteristic (TA = -40 to +105 °C, 2.4 V VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V, HS (high-speed main) mode) Parameter Symbol Conditions MIN. Temperature sensor output voltage VTMPS25 Setting ADS register = 80H, TA = +25 C Internal reference voltage VBGR Setting ADS register = 81H Temperature coefficient FVTMPS Temperature sensor that depends on the 3.6.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 3.6.4 Comparator (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Input voltage range Conditions MIN. Ivref Ivcmp Output delay VDD = 3.0 V Input slew rate > 50 mV/s td MAX. Unit 0 TYP. EVDD0 - 1.4 V -0.3 EVDD0 + 0.3 V Comparator high-speed mode, standard mode 1.2 s Comparator high-speed mode, window mode 2.0 s 5.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 3.6.6 LVD circuit characteristics (1) LVD Detection Voltage of Reset Mode and Interrupt Mode (TA = -40 to +105 C, VPDR VDD 5.5 V, VSS = 0 V) Parameter Detection voltage Supply voltage level Symbol VLVD0 VLVD1 VLVD2 VLVD3 VLVD4 VLVD5 VLVD6 VLVD7 Minimum pulse width Detection delay time R01DS0053EJ0200 Rev. 2.00 Oct 25, 2013 tLW MIN. TYP. MAX. Unit Power supply rise time Conditions 3.90 4.06 4.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 (2) LVD Detection Voltage of Interrupt & Reset Mode (TA = -40 to +105 C, VPDR VDD 5.5 V, VSS = 0 V) Parameter Symbol Interrupt and VLVDD0 reset mode VLVDD1 Conditions VLVDD2 VLVDD3 3.6.7 MIN. TYP. MAX. Unit 2.64 2.75 2.86 V Rising release reset voltage 2.81 2.92 3.03 V Falling interrupt voltage 2.75 2.86 2.97 V Rising release reset voltage 2.90 3.02 3.14 V Falling interrupt voltage 2.85 2.96 3.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 3.7 Data Memory STOP Mode Low Supply Voltage Data Retention Characteristics (TA = -40 to +105 C, VSS = 0V)) Parameter Data retention supply voltage Symbol Conditions MIN. TYP. MAX. Unit 5.5 V 1.44 Note VDDDR The value depends on the POR detection voltage. When the voltage drops, the data is retained before a POR reset is Note effected, but data is not retained when a POR reset is effected.
3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 C) RL78/G14 3.10 Timing for Switching Flash Memory Programming Modes (TA = -40 to +105 C, 2.4 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol How long from when an external reset ends until the tSUINIT Conditions MIN. POR and LVD reset must end TYP. MAX. Unit 100 ms before the external reset ends.
RL78/G14 4. PACKAGE DRAWINGS 4. PACKAGE DRAWINGS R01DS0053EJ0200 Rev. 2.
RL78/G14 4.1 4. PACKAGE DRAWINGS 30-pin products R5F104AAASP, R5F104ACASP, R5F104ADASP, R5F104AEASP, R5F104AFASP, R5F104AGASP R5F104AADSP, R5F104ACDSP, R5F104ADDSP, R5F104AEDSP, R5F104AFDSP, R5F104AGDSP R5F104AAGSP, R5F104ACGSP, R5F104ADGSP, R5F104AEGSP, R5F104AFGSP, R5F104AGGSP JEITA Package Code RENESAS Code Previous Code MASS (TYP.) [g] P-LSSOP30-0300-0.65 PLSP0030JB-B S30MC-65-5A4-3 0.
RL78/G14 4.2 4. PACKAGE DRAWINGS 32-pin products R5F104BAANA, R5F104BCANA, R5F104BDANA, R5F104BEANA, R5F104BFANA, R5F104BGANA R5F104BADNA, R5F104BCDNA, R5F104BDDNA, R5F104BEDNA, R5F104BFDNA, R5F104BGDNA R5F104BAGNA, R5F104BCGNA, R5F104BDGNA, R5F104BEGNA, R5F104BFGNA, R5F104BGGNA JEITA Package Code RENESAS Code Previous Code MASS (TYP.) [g] P-HWQFN32-5x5-0.50 PWQN0032KB-A P32K8-50-3B4-4 0.06 D DETAIL OF A PART E S A A S Referance Symbol y S D2 A EXPOSED DIE PAD 1 Min Nom Max D 4.
RL78/G14 4. PACKAGE DRAWINGS R5F104BAAFP, R5F104BCAFP, R5F104BDAFP, R5F104BEAFP, R5F104BFAFP, R5F104BGAFP R5F104BADFP, R5F104BCDFP, R5F104BDDFP, R5F104BEDFP, R5F104BFDFP, R5F104BGDFP R5F104BAGFP, R5F104BCGFP, R5F104BDGFP, R5F104BEGFP, R5F104BFGFP, R5F104BGGFP JEITA Package Code RENESAS Code Previous Code MASS (TYP.) [g] P-LQFP32-7x7-0.80 PLQP0032GB-A P32GA-80-GBT-1 0.2 HD 2 D 17 16 24 25 detail of lead end 1 E c HE θ 32 8 1 L 9 e (UNIT:mm) 3 b x M A A2 ITEM D DIMENSIONS 7.
RL78/G14 4.3 4. PACKAGE DRAWINGS 36-pin products R5F104CAALA, R5F104CCALA, R5F104CDALA, R5F104CEALA, R5F104CFALA, R5F104CGALA JEITA Package Code RENESAS Code Previous Code MASS (TYP.) [g] P-WFLGA36-4x4-0.50 PWLG0036KA-A P36FC-50-AA4-2 0.023 32x b S AB e ZE w S A M A ZD D x 6 5 B 4 E 3 2.90 2 C INDEX MARK y1 D w S B S 1 F E D C B A E 2.90 A S y S DETAIL C DETAIL E DETAIL D R0.17p 0.05 0.70 p0.05 0.55 p0.05 R0.12 p0.05 0.75 0.55 (UNIT:mm) R0.17 p0.05 0.70 p0.05 R0.
RL78/G14 4.4 4. PACKAGE DRAWINGS 40-pin products R5F104EAANA, R5F104ECANA, R5F104EDANA, R5F104EEANA, R5F104EFANA, R5F104EGANA, R5F104EHANA R5F104EADNA, R5F104ECDNA, R5F104EDDNA, R5F104EEDNA, R5F104EFDNA, R5F104EGDNA, R5F104EHDNA R5F104EAGNA, R5F104ECGNA, R5F104EDGNA, R5F104EEGNA, R5F104EFGNA, R5F104EGGNA, R5F104EHGNA JEITA Package Code RENESAS Code Previous Code MASS (TYP.) [g] P-HWQFN40-6x6-0.50 PWQN0040KC-A P40K8-50-4B4-4 0.
RL78/G14 4.5 4. PACKAGE DRAWINGS 44-pin products R5F104FAAFP, R5F104FCAFP, R5F104FDAFP, R5F104FEAFP, R5F104FFAFP, R5F104FGAFP, R5F104FHAFP, R5F104FJAFP R5F104FADFP, R5F104FCDFP, R5F104FDDFP, R5F104FEDFP, R5F104FFDFP, R5F104FGDFP, R5F104FHDFP, R5F104FJDFP R5F104FAGFP, R5F104FCGFP, R5F104FDGFP, R5F104FEGFP, R5F104FFGFP, R5F104FGGFP, R5F104FHGFP, R5F104FJGFP JEITA Package Code RENESAS Code Previous Code MASS (TYP.) [g] P-LQFP44-10x10-0.80 PLQP0044GC-A P44GB-80-UES-2 0.
RL78/G14 4.6 4. PACKAGE DRAWINGS 48-pin products R5F104GAAFB, R5F104GCAFB, R5F104GDAFB, R5F104GEAFB, R5F104GFAFB, R5F104GGAFB, R5F104GHAFB, R5F104GJAFB R5F104GADFB, R5F104GCDFB, R5F104GDDFB, R5F104GEDFB, R5F104GFDFB, R5F104GGDFB, R5F104GHDFB, R5F104GJDFB R5F104GAGFB, R5F104GCGFB, R5F104GDGFB, R5F104GEGFB, R5F104GFGFB, R5F104GGGFB, R5F104GHGFB, R5F104GJGFB JEITA Package Code RENESAS Code Previous Code MASS (TYP.) [g] P-LFQFP48-7x7-0.50 PLQP0048KF-A P48GA-50-8EU-1 0.
RL78/G14 4. PACKAGE DRAWINGS R5F104GAANA, R5F104GCANA, R5F104GDANA, R5F104GEANA, R5F104GFANA, R5F104GGANA, R5F104GHANA, R5F104GJANA R5F104GADNA, R5F104GCDNA, R5F104GDDNA, R5F104GEDNA, R5F104GFDNA, R5F104GGDNA, R5F104GHDNA, R5F104GJDNA R5F104GAGNA, R5F104GCGNA, R5F104GDGNA, R5F104GEGNA, R5F104GFGNA, R5F104GGGNA, R5F104GHGNA, R5F104GJGNA JEITA Package Code RENESAS Code Previous Code MASS (TYP.) [g] P-HWQFN48-7x7-0.50 PWQN0048KB-A 48PJN-A P48K8-50-5B4-5 0.
RL78/G14 4.7 4. PACKAGE DRAWINGS 52-pin products R5F104JCAFA, R5F104JDAFA, R5F104JEAFA, R5F104JFAFA, R5F104JGAFA, R5F104JHAFA, R5F104JJAFA R5F104JCDFA, R5F104JDDFA, R5F104JEDFA, R5F104JFDFA, R5F104JGDFA, R5F104JHDFA, R5F104JJDFA R5F104JCGFA, R5F104JDGFA, R5F104JEGFA, R5F104JFGFA, R5F104JGGFA, R5F104JHGFA, R5F104JJGFA JEITA Package Code RENESAS Code Previous Code MASS (TYP.) [g] P-LQFP52-10x10-0.65 PLQP0052JA-A P52GB-65-GBS-1 0.
RL78/G14 4.8 4. PACKAGE DRAWINGS 64-pin products R5F104LCAFA, R5F104LDAFA, R5F104LEAFA, R5F104LFAFA, R5F104LGAFA, R5F104LHAFA, R5F104LJAFA R5F104LCDFA, R5F104LDDFA, R5F104LEDFA, R5F104LFDFA, R5F104LGDFA, R5F104LHDFA, R5F104LJDFA R5F104LCGFA, R5F104LDGFA, R5F104LEGFA, R5F104LFGFA, R5F104LGGFA, R5F104LHGFA, R5F104LJGFA JEITA Package Code RENESAS Code Previous Code MASS (TYP.) [g] P-LQFP64-12x12-0.65 PLQP0064JA-A P64GK-65-UET-2 0.
RL78/G14 4. PACKAGE DRAWINGS R5F104LCAFB, R5F104LDAFB, R5F104LEAFB, R5F104LFAFB, R5F104LGAFB, R5F104LHAFB, R5F104LJAFB R5F104LCDFB, R5F104LDDFB, R5F104LEDFB, R5F104LFDFB, R5F104LGDFB, R5F104LHDFB, R5F104LJDFB R5F104LCGFB, R5F104LDGFB, R5F104LEGFB, R5F104LFGFB, R5F104LGGFB, R5F104LHGFB, R5F104LJGFB JEITA Package Code RENESAS Code Previous Code MASS (TYP.) [g] P-LFQFP64-10x10-0.50 PLQP0064KF-A P64GB-50-UEU-2 0.
RL78/G14 4. PACKAGE DRAWINGS R5F104LCALA, R5F104LDALA, R5F104LEALA, R5F104LFALA, R5F104LGALA, R5F104LHALA, R5F104LJALA 64-PIN PLASTIC FLGA (5x5) 60x b x M S AB A D w S A ZD e 8 ZE 7 6 B 5 E 4 3.90 3 2 C D INDEX MARK w S B 1 H G F E D C B E A 3.90 y1 A S S y S DETAIL C DETAIL E DETAIL D R0.17o0.015 0.70o0.03 0.55o0.04 R0.125o 0.02 0.75 0.55 R0.17o0.015 0.70o0.03 R0.125o0.02 0.55o0.04 0.75 0.55 b (LAND PAD) 0.34o0.03 (APERTURE OF SOLDER RESIST) 0.55 0.75 0.55o0.04 0.
RL78/G14 4. PACKAGE DRAWINGS R5F104LCAFP, R5F104LDAFP, R5F104LEAFP, R5F104LFAFP, R5F104LGAFP, R5F104LHAFP, R5F104LJAFP R5F104LCDFP, R5F104LDDFP, R5F104LEDFP, R5F104LFDFP, R5F104LGDFP, R5F104LHDFP, R5F104LJDFP R5F104LCGFP, R5F104LDGFP, R5F104LEGFP, R5F104LFGFP, R5F104LGGFP, R5F104LHGFP, R5F104LJGFP JEITA Package Code RENESAS Code Previous Code MASS (TYP.) [g] P-LQFP64-14x14-0.80 PLQP0064GA-A P64GC-80-GBW-1 0.
RL78/G14 4.9 4. PACKAGE DRAWINGS 80-pin products R5F104MFAFB, R5F104MGAFB, R5F104MHAFB, R5F104MJAFB R5F104MFDFB, R5F104MGDFB, R5F104MHDFB, R5F104MJDFB R5F104MFGFB, R5F104MGGFB, R5F104MHGFB, R5F104MJGFB JEITA Package Code RENESAS Code Previous Code MASS (TYP.) [g] P-LFQFP80-12x12-0.50 PLQP0080KE-A P80GK-50-8EU-2 0.53 HD D detail of lead end 41 60 61 A3 40 c Q E L Lp HE L1 (UNIT:mm) 21 80 1 20 ZE e ZD b x M S E 12.00p0.20 HD 14.00p0.20 HE 14.00p0.20 A 1.60 MAX. A1 0.10p0.
RL78/G14 4. PACKAGE DRAWINGS R5F104MFAFA, R5F104MGAFA, R5F104MHAFA, R5F104MJAFA R5F104MFDFA, R5F104MGDFA, R5F104MHDFA, R5F104MJDFA R5F104MFGFA, R5F104MGGFA, R5F104MHGFA, R5F104MJGFA JEITA Package Code RENESAS Code Previous Code MASS (TYP.) [g] P-LQFP80-14x14-0.65 PLQP0080JB-E P80GC-65-UBT-2 0.69 HD detail of lead end D L1 A A3 c 60 61 41 40 L Lp B E HE Referance Symbol 80 1 21 20 Dimension in Millimeters Min Nom Max D 13.80 14.00 14.20 14.20 E 13.80 14.00 HD 17.00 17.20 17.
RL78/G14 4.10 4. PACKAGE DRAWINGS 100-pin products R5F104PFAFB, R5F104PGAFB, R5F104PHAFB, R5F104PJAFB R5F104PFDFB, R5F104PGDFB, R5F104PHDFB, R5F104PJDFB R5F104PFGFB, R5F104PGGFB, R5F104PHGFB, R5F104PJGFB JEITA Package Code RENESAS Code Previous Code MASS (TYP.) [g] P-LFQFP100-14x14-0.50 PLQP0100KE-A P100GC-50-GBR-1 0.69 HD D detail of lead end A L1 75 76 51 50 A3 c B L E HE Lp (UNIT:mm) 26 25 100 1 ITEM D DIMENSIONS 14.00p0.20 E 14.00p0.20 HD 16.00p0.20 HE 16.00p0.20 A 1.
RL78/G14 4. PACKAGE DRAWINGS R5F104PFAFA, R5F104PGAFA, R5F104PHAFA, R5F104PJAFA R5F104PFDFA, R5F104PGDFA, R5F104PHDFA, R5F104PJDFA R5F104PFGFA, R5F104PGGFA, R5F104PHGFA, R5F104PJGFA JEITA Package Code RENESAS Code Previous Code MASS (TYP.) [g] P-LQFP100-14x20-0.65 PLQP0100JC-A P100GF-65-GBN-1 0.92 HD D detail of lead end A A3 51 50 80 81 c B E HE L Lp 100 1 L1 31 30 (UNIT:mm) ZE e ZD b x M S AB A A2 S ITEM D DIMENSIONS 20.00 0.20 E 14.00 0.20 HD 22.00 0.20 HE 16.00 0.
REVISION HISTORY Rev. Date Description Page 0.01 Feb 10, 2011 — 0.02 May 01, 2011 1 to 2 3 4 to 13 14 0.03 Jul 28, 2011 1.00 Feb 21, 2012 2.00 Oct 25, 2013 RL78/G14 Datasheet Summary First Edition issued 1.1 Features revised 1.2 Ordering Information revised 1.3 Pin Configuration (Top View) revised 1.4 Pin Identification revised 15 to 17 1.5.1 30-pin products to 1.5.3 36-pin products revised 23 to 26 1.6 Outline of Functions revised 1 1.1 Features revised 1 to 40 1.
REVISION HISTORY Rev. Date 2.00 Oct 25, 2013 RL78/G14 Datasheet Description Page 112 to 169 Summary Addition of CHAPTER 3 ELECTRICAL SPECIFICATIONS 171 to 187 Modification of 4.1 30-pin products to 4.10 100-pin products SuperFlash is a registered trademark of Silicon Storage Technology, Inc. in several countries including the United States and Japan. Caution: This product uses SuperFlash® technology licensed from Silicon Storage Technology, Inc.
NOTES FOR CMOS DEVICES (1) VOLTAGE APPLICATION WAVEFORM AT INPUT PIN: Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between VIL (MAX) and VIH (MIN) due to noise, etc., the device may malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between VIL (MAX) and VIH (MIN).
Notice 1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. 2.