Datasheet

RL78/G13 2. ELECTRICAL SPECIFICATIONS (A, D: T
A = -40 to +85°C)
Page 89 of 194R01DS0131EJ0310 Rev.3.10
Nov 15, 2013
(5) During communication at same potential (simplified I
2
C mode) (2/2)
(T
A = −40 to +85°C, 1.6 V ≤ EVDD0 = EVDD1 ≤ VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V)
Parameter Symbol Conditions HS (high-speed
main) Mode
LS (low-speed
main) Mode
LV (low-voltage
main) Mode
Unit
MIN. MAX. MIN. MAX. MIN. MAX.
Data setup time (reception) tSU:DAT
2.7 V ≤ EV
DD0 ≤ 5.5 V,
C
b = 50 pF, Rb = 2.7 kΩ
1/f
MCK
+ 85
Note2
1/fMCK
+ 145
Note2
1/fMCK
+ 145
Note2
ns
1.8 V ≤ EVDD0 ≤ 5.5 V,
C
b = 100 pF, Rb = 3 kΩ
1/f
MCK
+ 145
Note2
1/fMCK
+ 145
Note2
1/fMCK
+ 145
Note2
ns
1.8 V ≤ EVDD0 < 2.7 V,
C
b = 100 pF, Rb = 5 kΩ
1/f
MCK
+ 230
Note2
1/fMCK
+ 230
Note2
1/fMCK
+ 230
Note2
ns
1.7 V ≤ EVDD0 < 1.8 V,
C
b = 100 pF, Rb = 5 kΩ
1/f
MCK
+ 290
Note2
1/fMCK
+ 290
Note2
1/fMCK
+ 290
Note2
ns
1.6 V ≤ EVDD0 < 1.8 V,
C
b = 100 pF, Rb = 5 kΩ
⎯ 1/f
MCK
+ 290
Note2
1/fMCK
+ 290
Note2
ns
Data hold time
(transmission)
tHD:DAT
2.7 V ≤ EV
DD0 ≤ 5.5 V,
C
b = 50 pF, Rb = 2.7 kΩ
0 305 0 305 0 305 ns
1.8 V ≤ EVDD0 ≤ 5.5 V,
C
b = 100 pF, Rb = 3 kΩ
0 355 0 355 0 355 ns
1.8 V ≤ EVDD0 < 2.7 V,
C
b = 100 pF, Rb = 5 kΩ
0 405 0 405 0 405 ns
1.7 V ≤ EVDD0 < 1.8 V,
C
b = 100 pF, Rb = 5 kΩ
0 405 0 405 0 405 ns
1.6 V ≤ EVDD0 < 1.8 V,
C
b = 100 pF, Rb = 5 kΩ
⎯ 0 405 0 405 ns
Notes 1. The value must also be equal to or less than f
MCK/4.
2. Set the fMCK value to keep the hold time of SCLr = "L" and SCLr = "H".
Caution Select the normal input buffer and the N-ch open drain output (V
DD tolerance (When 20- to 52-pin
products)/EVDD tolerance (When 64- to 128-pin products)) mode for the SDAr pin and the normal
output mode for the SCLr pin by using port input mode register g (PIMg) and port output mode
register h (POMh).
(Remarks are listed on the next page.)