Datasheet

RL78/G13 2. ELECTRICAL SPECIFICATIONS (A, D: T
A = -40 to +85°C)
Page 62 of 194R01DS0131EJ0310 Rev.3.10
Nov 15, 2013
(TA = −40 to +85°C, 1.6 V ≤ EVDD0 = EVDD1 ≤ VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) (5/5)
Items Symbol Conditions MIN. TYP. MAX. Unit
Input leakage
current, high
ILIH1 P00 to P07, P10 to P17,
P30 to P37, P40 to P47,
P50 to P57, P60 to P67,
P70 to P77, P80 to P87,
P90 to P97, P100 to P106,
P110 to P117, P120,
P125 to P127, P140 to P147
V
I = EVDD0 1 μ A
ILIH2 P20 to P27, P137,
P150 to P156, RESET
VI = VDD 1 μ A
ILIH3 P121 to P124
(X1, X2, XT1, XT2, EXCLK,
EXCLKS)
V
I = VDD In input port or
external clock
input
1 μ A
In resonator
connection
10 μ A
Input leakage
current, low
ILIL1 P00 to P07, P10 to P17,
P30 to P37, P40 to P47,
P50 to P57, P60 to P67,
P70 to P77, P80 to P87,
P90 to P97, P100 to P106,
P110 to P117, P120,
P125 to P127, P140 to P147
V
I = EVSS0 −1 μ A
ILIL2 P20 to P27, P137,
P150 to P156, RESET
VI = VSS −1 μ A
ILIL3 P121 to P124
(X1, X2, XT1, XT2, EXCLK,
EXCLKS)
V
I = VSS In input port or
external clock
input
−1 μ A
In resonator
connection
−10 μ A
On-chip pll-up
resistance
RU P00 to P07, P10 to P17,
P30 to P37, P40 to P47,
P50 to P57, P64 to P67,
P70 to P77, P80 to P87,
P90 to P97, P100 to P106,
P110 to P117, P120,
P125 to P127, P140 to P147
V
I = EVSS0, In input port 10 20 100 kΩ
Remark Unless specified otherwise, the characteristics of alternate-function pins are the same as those of the
port pins.