Datasheet

RL78/G13 1. OUTLINE
Page 50 of 194R01DS0131EJ0310 Rev.3.10
Nov 15, 2013
[40-pin, 44-pin, 48-pin, 52-pin, 64-pin products]
Caution This outline describes the functions at the time when Peripheral I/O redirection register (PIOR)
is set to 00H.
(1/2)
Item 40-pin 44-pin 48-pin 52-pin 64-pin
R5F100Ex R5F101Ex
R5F100Fx R5F101Fx
R5F100Gx R5F101Gx
R5F100Jx R5F101Jx
R5F100Lx R5F101Lx
Code flash memory (KB) 16 to 192 16 to 512 16 to 512 32 to 512 32 to 512
Data flash memory (KB) 4 to 8 − 4 to 8 − 4 to 8 − 4 to 8 − 4 to 8 −
RAM (KB)
2 to 16
Note1
2 to 32
Note1
2 to 32
Note1
2 to 32
Note1
2 to 32
Note1
Address space 1 MB
Main system
clock
High-speed system
clock
X1 (crystal/ceramic) oscillation, external main system clock input (EXCLK)
1 to 20 MHz: V
DD = 2.7 to 5.5 V, 1 to 8 MHz: VDD = 1.8 to 2.7 V, 1 to 4 MHz: VDD = 1.6 to 1.8 V
High-speed on-chip
oscillator
HS (High-speed main) mode: 1 to 32 MHz (VDD = 2.7 to 5.5 V),
HS (High-speed main) mode: 1 to 16 MHz (V
DD = 2.4 to 5.5 V),
LS (Low-speed main) mode: 1 to 8 MHz (V
DD = 1.8 to 5.5 V),
LV (Low-voltage main) mode: 1 to 4 MHz (V
DD = 1.6 to 5.5 V)
Subsystem clock XT1 (crystal) oscillation, external subsystem clock input (EXCLKS)
32.768 kHz
Low-speed on-chip oscillator 15 kHz (TYP.)
General-purpose registers (8-bit register × 8) × 4 banks
Minimum instruction execution time 0.03125 μ s (High-speed on-chip oscillator: fIH = 32 MHz operation)
0.05 μ s (High-speed system clock: fMX = 20 MHz operation)
30.5 μ s (Subsystem clock: fSUB = 32.768 kHz operation)
Instruction set • Data transfer (8/16 bits)
• Adder and subtractor/logical operation (8/16 bits)
• Multiplication (8 bits × 8 bits)
• Rotate, barrel shift, and bit manipulation (Set, reset, test, and Boolean operation), etc.
I/O port Total 36 40 44 48 58
CMOS I/O 28
(N-ch O.D. I/O
[V
DD withstand
voltage]: 10)
31
(N-ch O.D. I/O
[V
DD withstand
voltage]: 10)
34
(N-ch O.D. I/O
[V
DD withstand
voltage]: 11)
38
(N-ch O.D. I/O
[V
DD withstand
voltage]: 13)
48
(N-ch O.D. I/O
[V
DD withstand
voltage]: 15)
CMOS input 5 5 5 5 5
CMOS output − − 1 1 1
N-ch O.D. I/O
(withstand voltage: 6
V)
3 4 4 4 4
Timer 16-bit timer 8 channels
Watchdog timer 1 channel
Real-time clock (RTC) 1 channel
12-bit interval timer (IT) 1 channel
Timer output 4 channels (PWM
outputs: 3
Note 2
),
8 channels (PWM
outputs: 7
Note 2
)
Note 3
5 channels (PWM outputs: 4
Note 2
),
8 channels (PWM outputs: 7
Note 2
)
Note 3
8 channels (PWM
outputs: 7
Note 2
)
RTC output 1 channel
• 1 Hz (subsystem clock: f
SUB = 32.768 kHz)
Notes 1. In the case of the 4 KB, this is about 3 KB when the self-programming function and data flash
function are used. (For details, see CHAPTER 3
in the RL78/G13 User’s Manual Hardware )
In the case of the 20 KB, this is about 19 KB when the self-programming function and data flash
function are used. (For details, see CHAPTER 3
in the RL78/G13 User’s Manual Hardware )
In the case of the 32 KB, this is about 31 KB when the self-programming function and data flash
function are used. (For details, see CHAPTER 3
in the RL78/G13 User’s Manual Hardware )
2. The number of PWM outputs varies depending on the setting of channels in use (the number of
masters and slaves) . (6.9.3 Operation as multiple PWM output function
in the RL78/G13 User’s
Manual Hardware )
3. When setting to PIOR = 1