Datasheet

Section 8 EXDMA Controller (EXDMAC)
Page 418 of 1408 R01UH0309EJ0500 Rev. 5.00
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
Bit Bit Name Initial Value R/W Description
3 DTSIZE 0 R/W Data Transmit Size
Specifies the size of data to be transferred.
0: Byte-size
1: Word-size
2 BGUP 0 R/W Bus Give-Up
When this bit is set to 1, the bus can be
transferred to an internal bus master in burst mode
or block transfer mode. This setting is ignored in
normal mode and cycle steal mode.
0: Bus is not released
1: Bus is transferred if requested by an internal
bus master
1
0
⎯
⎯
0
0
R/W
R/W
Reserved
These bits are always read as 0. The initial values
should not be modified.
Note: * Only 0 can be written, to clear the flag.