Datasheet

Section 16 USB Function Module (USB)
Page 958 of 1408 R01UH0309EJ0500 Rev. 5.00
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
16.3.6 Interrupt Enable Register 2 (IER2)
IER2 enables the interrupt requests of interrupt flag register 2 (IFR2). When an interrupt flag is set
to 1 while the corresponding bit of each interrupt is set to 1, an interrupt request is sent to the
CPU. The interrupt vector number is determined by the contents of interrupt select register 2
(ISR2).
Bit Bit Name
Initial
Value R/W Description
7
6
⎯
⎯
0
0
⎯
⎯
Reserved
These bits are always read as 0. The write value
should always be 0.
5 EP3 TRE 0 R/W EP3 Transfer Request
4 EP3 TSE 0 R/W EP3 Transmission Complete
3 EP2 TRE 0 R/W EP2 Transfer Request
2 EP2
EMPTYE
0 R/W EP2 FIFO Empty
1 EP2
ALLEMPE
0 R/W EP2 FIFO All Empty
0 EP1 FULLE 0 R/W EP1 FIFO Full