Datasheet

Section 16 USB Function Module (USB)
R01UH0309EJ0500 Rev. 5.00 Page 951 of 1408
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
16.3 Register Descriptions
The USB has following registers. For the information on the addresses of these registers and the
state of the register in each processing condition, see section 25, List of Registers.
• Interrupt flag register 0 (IFR0)
• Interrupt flag register 1 (IFR1)
• Interrupt flag register 2 (IFR2)
• Interrupt enable register 0 (IER0)
• Interrupt enable register 1 (IER1)
• Interrupt enable register 2 (IER2)
• Interrupt select register 0 (ISR0)
• Interrupt select register 1 (ISR1)
• Interrupt select register 2 (ISR2)
• EP0i data register (EPDR0i)
• EP0o data register (EPDR0o)
• EP0s data register (EPDR0s)
• EP1 data register (EPDR1)
• EP2 data register (EPDR2)
• EP3 data register (EPDR3)
• EP0o receive data size register (EPSZ0o)
• EP1 receive data size register (EPSZ1)
• Data status register 0 (DASTS0)
• Data status register 1 (DASTS1)
• Trigger register 0 (TRG0)
• Trigger register 1 (TRG1)
• FIFO clear register 0 (FCLR0)
• FIFO clear register 1 (FCLR1)
• Endpoint stall register 0 (EPSTL0)
• Endpoint stall register 1 (EPSTL1)
• Stall status register 1 (STLSR1)
• DMA transfer setting register (DMAR)
• Configuration value register (CVR)
• Control register (CTLR)
• Endpoint information register (EPIR)