Datasheet

Section 15 Serial Communication Interface (SCI, IrDA)
Page 936 of 1408 R01UH0309EJ0500 Rev. 5.00
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
(1) Transmission
In transmission, the output signal (UART frame) from the SCI is converted to an IR frame by the
IrDA interface (see figure 15.34).
When the serial data is 0, a high pulse of 3/16 the bit rate (interval equivalent to the width of one
bit) is output (initial value). The high-level pulse can be varied according to the setting of bits
IrCKS2 to IrCKS0 in IrCR.
In the specification, the high pulse width is fixed at a minimum of 1.41 µs, and a maximum of
(3/16 + 2.5%) × bit rate or (3/16 × bit rate) + 1.08 µs. When system clock φ is 20 MHz, 1.6 µs can
be set for a high pulse width with a minimum value of 1.41 µs.
When the serial data is 1, no pulse is output.
UART frame
Data
IR frame
Data
0000 011 111
0000 011 111
Start
bit
Transmit Receive
Stop
bit
Start
bit
Stop
bit
Bit
cycle
Pulse width
1.6 μs to 3/16 bit cycle
Figure 15.34 IrDA Transmit/Receive Operations