Datasheet

Section 2 CPU
R01UH0309EJ0500 Rev. 5.00 Page 51 of 1408
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
2.2.2 Advanced Mode
• Address Space
Linear access is provided to a 16-Mbyte maximum address space.
• Extended Registers (En)
The extended registers (E0 to E7) can be used as 16-bit registers, or as the upper 16-bit
segments of 32-bit registers or address registers.
• Instruction Set
All instructions and addressing modes can be used.
• Exception Vector Table and Memory Indirect Branch Addresses
In advanced mode the top area starting at H'00000000 is allocated to the exception vector table
in units of 32 bits. In each 32 bits, the upper 8 bits are ignored and a branch address is stored in
the lower 24 bits (figure 2.3). For details of the exception vector table, see section 4, Exception
Handling.
H'00000000
H'00000003
H'00000004
H'0000000B
H'0000000C
H'00000010
H'00000008
H'00000007
Reserved
Reserved
Reserved
Reset exception vector
(Reserved for system use)
(Reserved for system use)
Exception vector table
Exception vector 1
Figure 2.3 Exception Vector Table (Advanced Mode)