Datasheet

Section 10 I/O Ports
Page 688 of 1408 R01UH0309EJ0500 Rev. 5.00
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
Bit Bit Name Initial Value R/W Description
1 OES 1 R/W OE Output Select
Selects the OE/CKE* output pin port when the OEE
bit in DRAMCR is set to 1 (enabling OE/CKE*
output).
0: P35 is designated as OE-B/CKE-B*
1
output pin.
1: [For H8S/2456 Group and H8S/2456R Group]
PH3 is designated as OE-A/CKE-A* output pin.
[For H8S/2454 Group]
PH0 is designated as OE-A output pin.
0 ⎯ 0 ⎯ Reserved
This bit is always read as 0. Only the initial value
should be written to this bit.
Note: * Not supported in the H8S/2456 and H8S/2454 Groups.
10.18.4 Port Function Control Register 3 (PFCR3)
PFCR3 enables or disables DMAC activation interrupts from the USB, and switches the functions
of the PPG output pin, TPU input/output pin, and TMR input/output pin.
Bit Bit Name Initial Value R/W Description
7 ⎯ 1 ⎯ Reserved
This bit is always read as 1. Only the initial value
should be written to this bit.
6 PPGS 0 R/W PPG Pin Select
Selects the output pins of PO5 to PO0.
0: P25/PO5-A and P20/PO0-A are selected.
1: P85/PO5-B, P52/PO4-B, P83/PO3-B, P51/PO2-
B, P81/PO1-B, and P50/PO0-B are selected.
5 TPUS 0 R/W TPU Pin Select
Selects the output pins of TIOCA3, TIOCB3,
TIOCC3, TIOCD3, TIOCA4, and TIOCB4.
0: P25/TIOCB4-A and P20/TIOCA3-A are selected.
1: P85/TIOCB4-B, P52/TIOCA4-B, P83/TIOCD3-B,
P51/TIOCC3-B, P81/TIOCB3-B, and
P50/TIOCA3-B are selected.