Datasheet

Section 10 I/O Ports
R01UH0309EJ0500 Rev. 5.00 Page 661 of 1408
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
• Modes 3 and 7 (EXPE = 0)
Areas 2 to 5 ⎯
CS6E ⎯
SSU settings (1) in table below (2) in table below (3) in table below
PF2DDR 0 1 0*
3
⎯
Pin function PF2 input PF2 output SSI0-C input*
1
*
4
SSI0-C output*
2
*
4
Notes: 1. When using as SSI0-C input, set SSI0S1 and SSI0S0 in PFCR5 to B'10 before other
register setting.
2. When using as SSI0-C output, set SSI0S1 and SSI0S0 in PFCR5 to B'10 before other
register setting.
3. PF2DDR = 0 when the SSU pin is used as input.
4. Do not set up for SSU unless SSI0S1 and SSI0S0 = B'10 in PFCR5.
Use as I/O port.
SSU
settings
(1) (1) (3) (3) (2) (1) (2) (1) (1) (1) (1) (2) (1) (2) (2) (1) (2)
SSUMS 0 0 1*
1
BIDE 0 1*
2
0
MSS 0 1 0 1 0 1
TE 0 1 0 1 0 1 0 1 0 1 0 1
RE 0 1 0 1 1 0 1 1 0 1 0 1 0 1 1 0 1
Pin
state
⎯ ⎯ SSI
output
SSI
output
SSI
input
⎯ SSI
input
⎯ ⎯ ⎯ ⎯ SSI
input
⎯ SSI
input
SSI
input
⎯ SSI
input
[Legend]
⎯: Not used as the SSU pin (can be used as an I/O port).
Notes: See tables 20.4 to 20.6.
1. Do not set BIDE to 1 when SSUMS = 1 in SSU.
2. Do not specify that TE = RE = 1 when operating with BIDE = 1 (bidirectional mode).