Datasheet

Section 10 I/O Ports
R01UH0309EJ0500 Rev. 5.00 Page 597 of 1408
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
(2) Pin Functions of H8S/2454 Group
• P85/SCK3/PO5-B/TIOCB4-B/TMO1-B
The pin function is switched as shown below according to the combination of the TPU channel
4 settings (by bits MD3 to MD0 in TMDR_4, bits IOB3 to IOB0 in TIOR_4, and bits CCLR1
and CCLR0 in TCR_4), bits OS3 to OS0 in TCSR_1 of the 8-bit timer, bit NDER5 in NDERL
of PPG, bit C/A in SMR_3 and bits CKE0 and CKE1 in SCR_3 of SCI, bits PPGS, TPUS, and
TMRS in PFCR3, and bit P85DDR.
TPU channel
4 settings
(1) in table
below
(2) in table below
OS3 to OS0 ⎯ All 0 Not all 0
CKE1 ⎯ 0 1 ⎯
C/A ⎯ 0 1 ⎯ ⎯
CKE0 ⎯ 0 1 ⎯ ⎯ ⎯
P85DDR ⎯ 0 1 1 ⎯ ⎯ ⎯ ⎯
NDER5 ⎯ ⎯ 0 1 ⎯ ⎯ ⎯ ⎯
P85
input
P85 output PO5-B
output*
2
SCK3
output
SCK3
output
SCK3
input
TMO1-B
output*
4
Pin function TIOCB4-B
output*
3
TIOCB4-B input*
1
*
3
Notes: 1. TIOCB4-B input when MD3 to MD0 = B'0000 or B'01xx and IOB3 to IOB0 = B'10xx.
2. When using as PO5-B output, set PPGS in PFCR3 to 1 before other register setting.
3. When using as TIOCB4-B input/output, set TPUS in PFCR3 to 1 before other register
setting.
4. When using as TMO1-B output, set TMRS in PFCR3 to 1 before other register setting.
TPU channel 4
settings
(2) (1) (2) (2) (1) (2)
MD3 to MD0 B'0000, B'01xx B'0010 B'0011
IOB3 to IOB0 B'0000,
B'0100,
B'1xxx
B'0001 to
B'0011,
B'0101 to B'0111
⎯ B'xx00 Other than B'xx00
CCLR1,
CCLR0
⎯ ⎯ ⎯ ⎯ Other than
B'10
B'10
Output function ⎯ Output compare
output
⎯ ⎯ PWM mode 2
output
⎯
[Legend]
x: Don't care