Datasheet

Section 10 I/O Ports
Page 592 of 1408 R01UH0309EJ0500 Rev. 5.00
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
TPU channel 4
settings
(2) (1) (2) (2) (1) (2)
MD3 to MD0 B'0000, B'01xx B'0010 B'0011
IOB3 to IOB0 B'0000,
B'0100,
B'1xxx
B'0001 to
B'0011,
B'0101 to
B'0111
⎯ B'xx00 Other than B'xx00
CCLR1,
CCLR0
⎯ ⎯ ⎯ ⎯ Other than
B'10
B'10
Output function ⎯ Output
compare
output
⎯ ⎯ PWM mode
2 output
⎯
[Legend]
x: Don't care
• P84/IRQ4-B/EDACK2
The pin function is switched as shown below according to the combination of bit AMS in
EDMDR_2 of EXDMAC, bit P84DDR, and bit ITS4 in ITSR of the interrupt controller.
Operating mode 1, 2, 4 3, 7 (EXPE = 1) 3, 7 (EXPE = 0)
AMS 0 1 ⎯
P84DDR 0 1 ⎯ 0 1
P84 input P84 output EDACK2
output
P84 input P84 output Pin function
IRQ4-B interrupt input*
Note: * IRQ4-B input when the ITS4 bit in ITSR is 1.