Datasheet

Section 10 I/O Ports
Page 578 of 1408 R01UH0309EJ0500 Rev. 5.00
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
• Modes 3 and 7 (EXPE = 0)
BRLE
BREQS
⎯
ICE 0 1
TPU channel 3
settings
(1) in table
below
(2) in table below ⎯
RE ⎯ 0 1 ⎯
P51DDR ⎯ 0 1 1 ⎯ ⎯
NDER2 ⎯ ⎯ 0 1 ⎯ ⎯
P51 input P51 output PO2-B
output*
6
RxD2 input SCL3 I/O TIOCC3-B
output*
7
TIOCC3-B input*
1
*
7
IRQ1-A interrupt input*
2
Pin function
TMCI0-B input*
3
*
8