Datasheet

Section 10 I/O Ports
Page 572 of 1408 R01UH0309EJ0500 Rev. 5.00
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
10.5 Port 5
Port 5 is a 4-bit I/O port. Port 5 has the following registers. For the port function control registers,
refer to section 10.18, Port Function Control Registers.
• Port 5 data direction register (P5DDR)
• Port 5 data register (P5DR)
• Port 5 register (PORT5)
• Port 5 open drain control register (P5ODR)
• Port function control register 4 (PFCR4)
10.5.1 Port 5 Data Direction Register (P5DDR)
The individual bits of P5DDR specify input or output for the pins of port 5. P5DDR cannot be
read; if it is, an undefined value will be read.
Bit Bit Name Initial Value R/W Description
7 to 4 ⎯ All 0 ⎯ Reserved
3 P53DDR 0 W
2 P52DDR 0 W
1 P51DDR 0 W
0 P50DDR 0 W
When a pin function is specified as a general
purpose I/O, setting this bit to 1 makes the
corresponding pin an output port, while clearing this
bit to 0 makes the corresponding pin an input port.
10.5.2 Port 5 Data Register (P5DR)
P5DR stores output data for the port 5 pins.
Bit Bit Name Initial Value R/W Description
7 to 4 ⎯ All 0 ⎯ Reserved
These bits are always read as 0 and cannot be
modified.
3 P53DR 0 R/W
2 P52DR 0 R/W
1 P51DR 0 R/W
0 P50DR 0 R/W
Output data for a pin is stored when the pin function
is specified as a general purpose I/O.