Datasheet

Section 10 I/O Ports
R01UH0309EJ0500 Rev. 5.00 Page 555 of 1408
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
• P25/PO5-A/TIOCB4-A/IRQ13-B/WAIT-B/VBUS
The pin function is switched as shown below according to the combination of the operating
mode, bit EXPE, bit WAITE in BCR of the bus controller, TPU channel 4 settings by bits
MD3 to MD0 in TMDR_4, bits IOB3 to IOB0 in TIOR_4, and bits CCLR1 and CCLR0 in
TCR_4, bit NDER5 in NDERL of PPG, bits PPGS and TPUS in PFCR3, bit WAITS in
PFCR4, bit P25DDR, and bit ITS13 in ITSR of the interrupt controller.
• Modes 1, 2, and 4 Modes 3 and 7 (EXPE = 1)
WAITE 0 1
TPU channel 4
settings
(1) in table
below
(2) in table below ⎯
P25DDR ⎯ 0 1 1 ⎯
NDER5 ⎯ ⎯ 0 1 ⎯
P25 input P25 output PO5-A output
*
3
WAIT-B input*
5
TIOCB4-A
output
*
4
TIOCB4-A input*
1
*
4
IRQ13-B interrupt input
*
2
Pin function
VBUS input
• Modes 3 and 7 (EXPE = 0)
WAITE ⎯
TPU channel 4
settings
(1) in table below (2) in table below
P25DDR ⎯ 0 0 1
NDER5 ⎯ ⎯ ⎯ 0
P25 input P25 output PO5-A output
*
3
TIOCB4-A output
*
4
TIOCB4-A input*
1
*
4
IRQ13-B interrupt input
*
2
Pin function
VBUS input
Notes: 1. TIOCB4-A input when MD3 to MD0 = B'0000 or B'01xx and IOB3 to IOB0 = B'10xx.
2. IRQ13-B input when the ITS13 bit in ITSR is 1.
3. When using as PO5-A output, set PPGS in PFCR3 to 0 before other register setting.
4. When using as TIOCB4-A input/output, set TPUS in PFCR3 to 0 before other register
setting.
5. WAIT-B input when the WAITS bit in PFCR4 is 1. Not used as WAIT-B input when
WAITS is 0.