Datasheet

Section 10 I/O Ports
Page 524 of 1408 R01UH0309EJ0500 Rev. 5.00
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
10.1.2 Port 1 Data Register (P1DR)
P1DR stores output data for the port 1 pins.
Bit Bit Name Initial Value R/W Description
7 P17DR 0 R/W
6 P16DR 0 R/W
5 P15DR 0 R/W
4 P14DR 0 R/W
3 P13DR 0 R/W
2 P12DR 0 R/W
1 P11DR 0 R/W
0 P10DR 0 R/W
Output data for a pin is stored when the pin function
is specified as a general purpose I/O.
10.1.3 Port 1 Register (PORT1)
PORT1 shows the pin states of port 1. PORT1 cannot be modified.
Bit Bit Name Initial Value R/W Description
7 P17 ⎯* R
6 P16 ⎯* R
5 P15 ⎯* R
4 P14 ⎯* R
3 P13 ⎯* R
2 P12 ⎯* R
1 P11 ⎯* R
0 P10 ⎯* R
If this register is read while a P1DDR bit is set to 1,
the corresponding P1DR value is read. If this
register is read while a P1DDR bit is cleared to 0,
the corresponding pin state is read.
Note: * Determined by the states of pins P17 to P10.