Datasheet

Section 9 Data Transfer Controller (DTC)
R01UH0309EJ0500 Rev. 5.00 Page 477 of 1408
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
Section 9 Data Transfer Controller (DTC)
This LSI includes a data transfer controller (DTC). The DTC can be activated by an interrupt or
software, to transfer data.
Figure 9.1 shows a block diagram of the DTC.
9.1 Features
• Transfer possible over any number of channels
• Three transfer modes
1. Normal mode
One operation transfers one byte or one word of data.
Memory address is incremented or decremented by 1 or 2.
From 1 to 65,536 transfers can be specified.
2. Repeat mode
One operation transfers one byte or one word of data.
Memory address is incremented or decremented by 1 or 2.
Once the specified number of transfers (1 to 256) has ended, the initial state is restored, and
transfer is repeated.
3. Block transfer mode
One operation transfers one block of data.
The block size is 1 to 256 bytes or words.
From 1 to 65,536 transfers can be specified.
Either the transfer source or the transfer destination is designated as a block area.
• One activation source can trigger a number of data transfers (chain transfer).
• Direct specification of 16-Mbyte address space possible.
• Activation by software is possible.
• Transfer can be set in byte or word units.
• A CPU interrupt can be requested for the interrupt that activated the DTC.
• Module stop state can be set.