Datasheet

Section 8 EXDMA Controller (EXDMAC)
Page 416 of 1408 R01UH0309EJ0500 Rev. 5.00
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
Bit Bit Name Initial Value R/W Description
10 AMS 0 R/W Address Mode Select
Selects single address mode or dual address
mode. When single address mode is selected, the
EDACK pin is valid.
0: Dual address mode
1: Single address mode
9
8
MDS1
MDS0
0
0
R/W
R/W
Mode Select 1 and 0
These bits specify the activation source, bus
mode, and transfer mode.
00: Auto request, cycle steal mode, normal
transfer mode
01: Auto request, burst mode, normal transfer
mode
10: External request, cycle steal mode, normal
transfer mode
11: External request, cycle steal mode, block
transfer mode
7 EDIE 0 R/W EXDMA Interrupt Enable
Enables or disables interrupt requests. When this
bit is set to 1, an interrupt is requested when the
IRF bit is set to 1. The interrupt request is cleared
by clearing this bit or the IRF bit to 0.
0: Interrupt request is not generated
1: Interrupt request is generated