Datasheet

Section 1 Overview
Page 4 of 1408 R01UH0309EJ0500 Rev. 5.00
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
Type
Module/
Function Description
DMA controller
(DMAC)
• DMA transfer is possible on four channels
• Three activation sources (auto-request, on-chip module
interrupt, and external request)
• Byte or word can be set as the transfer unit
• Short address mode or full address mode can be selected
• 16-Mbyte address space can be specified directly
EXDMA controller
(EXDMAC)
• DMA transfer is possible on two channels
• Two activation sources (auto-request and external request)
• Two transfer modes (normal mode and block transfer mode)
• Dual address mode or single address mode can be selected
• 16-Mbyte address space can be specified directly
• Repeat area can be set
Note: EXDMAC is supported only by the H8S/2456 Group and
H8S/2456R Group.
DMA
Data transfer
controller (DTC)
• Transfer is possible on any number of channels
• An interrupt source can trigger data transfer (chain transfer is
possible)
• Three transfer modes (normal mode, repeat mode, and block
transfer mode)
• Byte or word can be set as the transfer unit
• Activation by software is possible
External
bus
extension
Bus controller
(BSC)
• External address space: 16 Mbytes
• Manages the external address space divided into eight areas
Chip select signals (CS0 to CS7) can be output
8-bit access or 16-bit access can be selected
2-state access or 3-state access can be selected
Program wait states can be inserted
• External memory interfaces (burst ROM, DRAM, synchronous
DRAM*, address/data multiplexed I/O)
• Bus arbitration function (bus arbitration of the bus masters
CPU, DTC, DMAC, and EXDMAC)
Note * Supported only by the H8S/2456R Group.