Datasheet

Section 6 Bus Controller (BSC)
R01UH0309EJ0500 Rev. 5.00 Page 309 of 1408
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
6.10.2 Pin States in Idle Cycle
Table 6.13 shows the pin states in an idle cycle.
Table 6.13 Pin States in Idle Cycle
Pins Pin State
A23 to A0 Contents of following bus cycle
D15 to D0 High impedance
CSn (n = 7 to 0) High
*
1
*
2
UCAS, LCAS High
*
2
AS/AH High
RD High
OE High
HWR, LWR High
DACKn (n = 1, 0) High
EDACKn (n = 3 to 0) High
Notes: 1. Remains low in DRAM space RAS down mode.
2. Remains low in a DRAM space refresh cycle.