Datasheet

Section 6 Bus Controller (BSC)
Page 242 of 1408 R01UH0309EJ0500 Rev. 5.00
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
Normal space
read
DRAM space
read
T
p
T
r
T
c1
T
c2
T
1
T
2
DRAM space read
T
c1
T
c2
Note: n = 2 to 5
RASn (CSn)
UCAS, LCAS
RD
OE
Data bus
A
ddress bus
φ
Row address Column address 1 Column address 2External address
Figure 6.44 Example of Operation Timing in RAS Down Mode
(RAST = 0, CAST = 0)