Datasheet

Page xxii of xxx
13.8.8 Interrupts in Module Stop State ............................................................................ 846
Section 14 Watchdog Timer (WDT) .................................................................847
14.1 Features.............................................................................................................................. 847
14.2 Input/Output Pin ................................................................................................................848
14.3 Register Descriptions......................................................................................................... 849
14.3.1 Timer Counter (TCNT)......................................................................................... 849
14.3.2 Timer Control/Status Register (TCSR)................................................................. 849
14.3.3 Reset Control/Status Register (RSTCSR)............................................................. 851
14.4 Operation ........................................................................................................................... 852
14.4.1 Watchdog Timer Mode......................................................................................... 852
14.4.2 Interval Timer Mode............................................................................................. 854
14.5 Interrupt Source ................................................................................................................. 854
14.6 Usage Notes ....................................................................................................................... 855
14.6.1 Notes on Register Access ..................................................................................... 855
14.6.2 Contention between Timer Counter (TCNT) Write and Increment ...................... 857
14.6.3 Changing Value of CKS2 to CKS0 ...................................................................... 857
14.6.4 Switching between Watchdog Timer Mode and Interval Timer Mode................. 857
14.6.5 Internal Reset in Watchdog Timer Mode.............................................................. 858
14.6.6 System Reset by WDTOVF Signal....................................................................... 858
Section 15 Serial Communication Interface (SCI, IrDA) .................................859
15.1 Features.............................................................................................................................. 859
15.2 Input/Output Pins...............................................................................................................862
15.3 Register Descriptions......................................................................................................... 863
15.3.1 Receive Shift Register (RSR) ............................................................................... 864
15.3.2 Receive Data Register (RDR)............................................................................... 864
15.3.3 Transmit Data Register (TDR).............................................................................. 865
15.3.4 Transmit Shift Register (TSR).............................................................................. 865
15.3.5 Serial Mode Register (SMR) ................................................................................ 865
15.3.6 Serial Control Register (SCR) .............................................................................. 869
15.3.7 Serial Status Register (SSR) ................................................................................. 874
15.3.8 Smart Card Mode Register (SCMR)..................................................................... 882
15.3.9 Bit Rate Register (BRR) ....................................................................................... 883
15.3.10 IrDA Control Register (IrCR)............................................................................... 891
15.3.11 SCI_2 Serial Extension Mode Register (SEMR) .................................................. 892
15.4 Operation in Asynchronous Mode ..................................................................................... 894
15.4.1 Data Transfer Format............................................................................................ 894
15.4.2 Receive Data Sampling Timing and Reception Margin in Asynchronous
Mode..................................................................................................................... 896