Section 6 Bus Controller (BSC)
Page 166 of 1408 R01UH0309EJ0500 Rev. 5.00
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
Bus cycle
T
1
T
2
RD
φ
Data
RD
Data
RDNn = 0
RDNn = 1
T
3
Figure 6.2 Read Strobe Negation Timing (Example of 3-State Access Space)
